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Added New Port PSOC Edge (II)
Python code lint and formatting with ruff #15752: Pull request #18910 synchronize by jaenrig-ifx
github/workflows: Bump actions/github-script from 8 to 9.
Python code lint and formatting with ruff #15751: Commit 1c63211 pushed by dpgeorge
11s master
extmod/machine_can: Use UINT_FMT for mp_uint_t printf arg.
Python code lint and formatting with ruff #15745: Commit 48a00ea pushed by dpgeorge
2m 42s master
rp2/clocks_extra: Set VREG like the SDK does: needed for 200 MHz.
Python code lint and formatting with ruff #15740: Commit b9d709c pushed by dpgeorge
27s master
rp2/rp2_pio: Correct bit access for rp2_state_machine_init.
Python code lint and formatting with ruff #15739: Commit 7db3204 pushed by dpgeorge
12s master
rp2/rp2_dma: Add support for DMA pacing timers.
Python code lint and formatting with ruff #15736: Commit 5b7a7d8 pushed by dpgeorge
14s master
Refactor PSRAM clock frequency handling
Python code lint and formatting with ruff #15735: Pull request #19224 synchronize by phuzzyday
Refactor PSRAM clock frequency handling
Python code lint and formatting with ruff #15734: Pull request #19224 synchronize by phuzzyday
tests: Update ESP32-Cx detection to match standard name.
Python code lint and formatting with ruff #15733: Commit 334c031 pushed by dpgeorge
17s master
esp32/espnow: Clear the recv_cb & arg on deinit.
Python code lint and formatting with ruff #15731: Commit 5555847 pushed by dpgeorge
46s master
stm32/tinyusb_port: Add missing USB_HS_PHYC_PLL1_PLLSEL constants.
Python code lint and formatting with ruff #15730: Commit 7d19adb pushed by dpgeorge
28s master