1// SPDX-License-Identifier: MIT
2/*
3 * Copyright © 2021 Intel Corporation
4 */
5
6/* for ioread64 */
7#include <linux/io-64-nonatomic-lo-hi.h>
8
9#include "regs/xe_gtt_defs.h"
10#include "xe_ggtt.h"
11#include "xe_mmio.h"
12
13#include "i915_vma.h"
14#include "intel_crtc.h"
15#include "intel_display.h"
16#include "intel_display_core.h"
17#include "intel_display_regs.h"
18#include "intel_display_types.h"
19#include "intel_fb.h"
20#include "intel_fb_pin.h"
21#include "intel_frontbuffer.h"
22#include "intel_plane.h"
23#include "intel_plane_initial.h"
24#include "xe_bo.h"
25#include "xe_vram_types.h"
26#include "xe_wa.h"
27
28#include <generated/xe_device_wa_oob.h>
29
30void intel_plane_initial_vblank_wait(struct intel_crtc *crtc)
31{
32 /* Early xe has no irq */
33 struct xe_device *xe = to_xe_device(dev: crtc->base.dev);
34 struct xe_reg pipe_frmtmstmp = XE_REG(i915_mmio_reg_offset(PIPE_FRMTMSTMP(crtc->pipe)));
35 u32 timestamp;
36 int ret;
37
38 timestamp = xe_mmio_read32(mmio: xe_root_tile_mmio(xe), reg: pipe_frmtmstmp);
39
40 ret = xe_mmio_wait32_not(mmio: xe_root_tile_mmio(xe), reg: pipe_frmtmstmp, mask: ~0U, val: timestamp, timeout_us: 40000U, out_val: &timestamp, atomic: false);
41 if (ret < 0)
42 drm_warn(&xe->drm, "waiting for early vblank failed with %i\n", ret);
43}
44
45static bool
46intel_reuse_initial_plane_obj(struct intel_crtc *this,
47 const struct intel_initial_plane_config plane_configs[],
48 struct drm_framebuffer **fb)
49{
50 struct xe_device *xe = to_xe_device(dev: this->base.dev);
51 struct intel_crtc *crtc;
52
53 for_each_intel_crtc(&xe->drm, crtc) {
54 struct intel_plane *plane =
55 to_intel_plane(crtc->base.primary);
56 const struct intel_plane_state *plane_state =
57 to_intel_plane_state(plane->base.state);
58 const struct intel_crtc_state *crtc_state =
59 to_intel_crtc_state(crtc->base.state);
60
61 if (!crtc_state->uapi.active)
62 continue;
63
64 if (!plane_state->ggtt_vma)
65 continue;
66
67 if (plane_configs[this->pipe].base == plane_configs[crtc->pipe].base) {
68 *fb = plane_state->hw.fb;
69 return true;
70 }
71 }
72
73 return false;
74}
75
76static struct xe_bo *
77initial_plane_bo(struct xe_device *xe,
78 struct intel_initial_plane_config *plane_config)
79{
80 struct xe_tile *tile0 = xe_device_get_root_tile(xe);
81 struct xe_bo *bo;
82 resource_size_t phys_base;
83 u32 base, size, flags;
84 u64 page_size = xe->info.vram_flags & XE_VRAM_FLAGS_NEED64K ? SZ_64K : SZ_4K;
85
86 if (plane_config->size == 0)
87 return NULL;
88
89 flags = XE_BO_FLAG_SCANOUT | XE_BO_FLAG_GGTT;
90
91 base = round_down(plane_config->base, page_size);
92 if (IS_DGFX(xe)) {
93 u64 pte = xe_ggtt_read_pte(ggtt: tile0->mem.ggtt, offset: base);
94
95 if (!(pte & XE_GGTT_PTE_DM)) {
96 drm_err(&xe->drm,
97 "Initial plane programming missing DM bit\n");
98 return NULL;
99 }
100
101 phys_base = pte & ~(page_size - 1);
102 flags |= XE_BO_FLAG_VRAM0;
103
104 /*
105 * We don't currently expect this to ever be placed in the
106 * stolen portion.
107 */
108 if (phys_base >= xe_vram_region_usable_size(vram: tile0->mem.vram)) {
109 drm_err(&xe->drm,
110 "Initial plane programming using invalid range, phys_base=%pa\n",
111 &phys_base);
112 return NULL;
113 }
114
115 drm_dbg(&xe->drm,
116 "Using phys_base=%pa, based on initial plane programming\n",
117 &phys_base);
118 } else {
119 struct ttm_resource_manager *stolen = ttm_manager_type(bdev: &xe->ttm, XE_PL_STOLEN);
120
121 if (!stolen)
122 return NULL;
123 phys_base = base;
124 flags |= XE_BO_FLAG_STOLEN;
125
126 if (XE_DEVICE_WA(xe, 22019338487_display))
127 return NULL;
128
129 /*
130 * If the FB is too big, just don't use it since fbdev is not very
131 * important and we should probably use that space with FBC or other
132 * features.
133 */
134 if (IS_ENABLED(CONFIG_FRAMEBUFFER_CONSOLE) &&
135 plane_config->size * 2 >> PAGE_SHIFT >= stolen->size)
136 return NULL;
137 }
138
139 size = round_up(plane_config->base + plane_config->size,
140 page_size);
141 size -= base;
142
143 bo = xe_bo_create_pin_map_at_novm(xe, tile: tile0, size, offset: phys_base,
144 type: ttm_bo_type_kernel, flags, alignment: 0, intr: false);
145 if (IS_ERR(ptr: bo)) {
146 drm_dbg(&xe->drm,
147 "Failed to create bo phys_base=%pa size %u with flags %x: %li\n",
148 &phys_base, size, flags, PTR_ERR(bo));
149 return NULL;
150 }
151
152 return bo;
153}
154
155static bool
156intel_alloc_initial_plane_obj(struct intel_crtc *crtc,
157 struct intel_initial_plane_config *plane_config)
158{
159 struct xe_device *xe = to_xe_device(dev: crtc->base.dev);
160 struct drm_mode_fb_cmd2 mode_cmd = { 0 };
161 struct drm_framebuffer *fb = &plane_config->fb->base;
162 struct xe_bo *bo;
163
164 switch (fb->modifier) {
165 case DRM_FORMAT_MOD_LINEAR:
166 case I915_FORMAT_MOD_X_TILED:
167 case I915_FORMAT_MOD_Y_TILED:
168 case I915_FORMAT_MOD_4_TILED:
169 break;
170 default:
171 drm_dbg_kms(&xe->drm,
172 "Unsupported modifier for initial FB: 0x%llx\n",
173 fb->modifier);
174 return false;
175 }
176
177 mode_cmd.pixel_format = fb->format->format;
178 mode_cmd.width = fb->width;
179 mode_cmd.height = fb->height;
180 mode_cmd.pitches[0] = fb->pitches[0];
181 mode_cmd.modifier[0] = fb->modifier;
182 mode_cmd.flags = DRM_MODE_FB_MODIFIERS;
183
184 bo = initial_plane_bo(xe, plane_config);
185 if (!bo)
186 return false;
187
188 if (intel_framebuffer_init(to_intel_framebuffer(fb),
189 &bo->ttm.base, fb->format, &mode_cmd)) {
190 drm_dbg_kms(&xe->drm, "intel fb init failed\n");
191 goto err_bo;
192 }
193 /* Reference handed over to fb */
194 xe_bo_put(bo);
195
196 return true;
197
198err_bo:
199 xe_bo_unpin_map_no_vm(bo);
200 return false;
201}
202
203static void
204intel_find_initial_plane_obj(struct intel_crtc *crtc,
205 struct intel_initial_plane_config plane_configs[])
206{
207 struct intel_initial_plane_config *plane_config =
208 &plane_configs[crtc->pipe];
209 struct intel_plane *plane =
210 to_intel_plane(crtc->base.primary);
211 struct intel_plane_state *plane_state =
212 to_intel_plane_state(plane->base.state);
213 struct drm_framebuffer *fb;
214 struct i915_vma *vma;
215
216 /*
217 * TODO:
218 * Disable planes if get_initial_plane_config() failed.
219 * Make sure things work if the surface base is not page aligned.
220 */
221 if (!plane_config->fb)
222 return;
223
224 if (intel_alloc_initial_plane_obj(crtc, plane_config))
225 fb = &plane_config->fb->base;
226 else if (!intel_reuse_initial_plane_obj(crtc, plane_configs, &fb))
227 goto nofb;
228
229 plane_state->uapi.rotation = plane_config->rotation;
230 intel_fb_fill_view(to_intel_framebuffer(fb),
231 plane_state->uapi.rotation, &plane_state->view);
232
233 vma = intel_fb_pin_to_ggtt(fb, &plane_state->view.gtt,
234 0, 0, 0, false, &plane_state->flags);
235 if (IS_ERR(ptr: vma))
236 goto nofb;
237
238 plane_state->ggtt_vma = vma;
239
240 plane_state->surf = i915_ggtt_offset(plane_state->ggtt_vma);
241
242 plane_state->uapi.src_x = 0;
243 plane_state->uapi.src_y = 0;
244 plane_state->uapi.src_w = fb->width << 16;
245 plane_state->uapi.src_h = fb->height << 16;
246
247 plane_state->uapi.crtc_x = 0;
248 plane_state->uapi.crtc_y = 0;
249 plane_state->uapi.crtc_w = fb->width;
250 plane_state->uapi.crtc_h = fb->height;
251
252 plane_state->uapi.fb = fb;
253 drm_framebuffer_get(fb);
254
255 plane_state->uapi.crtc = &crtc->base;
256 intel_plane_copy_uapi_to_hw_state(plane_state, plane_state, crtc);
257
258 atomic_or(i: plane->frontbuffer_bit, v: &to_intel_frontbuffer(fb)->bits);
259
260 plane_config->vma = vma;
261 return;
262
263nofb:
264 /*
265 * We've failed to reconstruct the BIOS FB. Current display state
266 * indicates that the primary plane is visible, but has a NULL FB,
267 * which will lead to problems later if we don't fix it up. The
268 * simplest solution is to just disable the primary plane now and
269 * pretend the BIOS never had it enabled.
270 */
271 intel_plane_disable_noatomic(crtc, plane);
272}
273
274static void plane_config_fini(struct intel_initial_plane_config *plane_config)
275{
276 if (plane_config->fb) {
277 struct drm_framebuffer *fb = &plane_config->fb->base;
278
279 /* We may only have the stub and not a full framebuffer */
280 if (drm_framebuffer_read_refcount(fb))
281 drm_framebuffer_put(fb);
282 else
283 kfree(objp: fb);
284 }
285}
286
287void intel_initial_plane_config(struct intel_display *display)
288{
289 struct intel_initial_plane_config plane_configs[I915_MAX_PIPES] = {};
290 struct intel_crtc *crtc;
291
292 for_each_intel_crtc(display->drm, crtc) {
293 struct intel_initial_plane_config *plane_config =
294 &plane_configs[crtc->pipe];
295
296 if (!to_intel_crtc_state(crtc->base.state)->uapi.active)
297 continue;
298
299 /*
300 * Note that reserving the BIOS fb up front prevents us
301 * from stuffing other stolen allocations like the ring
302 * on top. This prevents some ugliness at boot time, and
303 * can even allow for smooth boot transitions if the BIOS
304 * fb is large enough for the active pipe configuration.
305 */
306 display->funcs.display->get_initial_plane_config(crtc, plane_config);
307
308 /*
309 * If the fb is shared between multiple heads, we'll
310 * just get the first one.
311 */
312 intel_find_initial_plane_obj(crtc, plane_configs);
313
314 if (display->funcs.display->fixup_initial_plane_config(crtc, plane_config))
315 intel_plane_initial_vblank_wait(crtc);
316
317 plane_config_fini(plane_config);
318 }
319}
320

source code of linux/drivers/gpu/drm/xe/display/xe_plane_initial.c