16-Bit RISC processor written in VHDL. Could be implemented onto FPGA with proper configuration.

The Architecture of this processor is take from Github Repo

• 14 available instruction
• 8 General purpose Registers
• Available LDR/STR
• Branch Available with instructions B/BEQ
• Default Clock Speed set at 10 ns or 100 Mhz

This project was just to learn bit more about Microprocessor Organisation. This Repo was key towards my learning.