16-Bit-RISC Processor

16-Bit RISC processor written in VHDL. Could be implemented onto FPGA with proper configuration.

The Architecture of this processor is take from Github Repo

ALU Opcode

This project was just to learn bit more about Microprocessor Organisation. This Repo was key towards my learning.

Name		Name	Last commit message	Last commit date
Latest commit History 6 Commits
16-Bit RISC.png		16-Bit RISC.png
16-Bit RSIC.xlsx		16-Bit RSIC.xlsx
8-BIt RISC Microprocessor.xpr		8-BIt RISC Microprocessor.xpr
ALU.vhd		ALU.vhd
CPU.vhd		CPU.vhd
ControlUnit.vhd		ControlUnit.vhd
Decoder.vhd		Decoder.vhd
Memory.vhd		Memory.vhd
PC.vhd		PC.vhd
README.md		README.md
RegisterFile.vhd		RegisterFile.vhd
ResNet_V1_BrainTumour.ipynb		ResNet_V1_BrainTumour.ipynb
test.vhd		test.vhd