1/*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26#include <trace/events/dma_fence.h>
27
28#include "virtgpu_drv.h"
29
30#define to_virtio_gpu_fence(x) \
31 container_of(x, struct virtio_gpu_fence, f)
32
33static const char *virtio_gpu_get_driver_name(struct dma_fence *f)
34{
35 return "virtio_gpu";
36}
37
38static const char *virtio_gpu_get_timeline_name(struct dma_fence *f)
39{
40 return "controlq";
41}
42
43static bool virtio_gpu_fence_signaled(struct dma_fence *f)
44{
45 /* leaked fence outside driver before completing
46 * initialization with virtio_gpu_fence_emit.
47 */
48 WARN_ON_ONCE(f->seqno == 0);
49 return false;
50}
51
52static const struct dma_fence_ops virtio_gpu_fence_ops = {
53 .get_driver_name = virtio_gpu_get_driver_name,
54 .get_timeline_name = virtio_gpu_get_timeline_name,
55 .signaled = virtio_gpu_fence_signaled,
56};
57
58struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,
59 uint64_t base_fence_ctx,
60 uint32_t ring_idx)
61{
62 uint64_t fence_context = base_fence_ctx + ring_idx;
63 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
64 struct virtio_gpu_fence *fence = kzalloc(sizeof(struct virtio_gpu_fence),
65 GFP_KERNEL);
66
67 if (!fence)
68 return fence;
69
70 fence->drv = drv;
71 fence->ring_idx = ring_idx;
72 fence->emit_fence_info = !(base_fence_ctx == drv->context);
73
74 /* This only partially initializes the fence because the seqno is
75 * unknown yet. The fence must not be used outside of the driver
76 * until virtio_gpu_fence_emit is called.
77 */
78
79 dma_fence_init(fence: &fence->f, ops: &virtio_gpu_fence_ops, lock: &drv->lock,
80 context: fence_context, seqno: 0);
81
82 return fence;
83}
84
85void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
86 struct virtio_gpu_ctrl_hdr *cmd_hdr,
87 struct virtio_gpu_fence *fence)
88{
89 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
90 unsigned long irq_flags;
91
92 spin_lock_irqsave(&drv->lock, irq_flags);
93 fence->fence_id = fence->f.seqno = ++drv->current_fence_id;
94 dma_fence_get(fence: &fence->f);
95 list_add_tail(new: &fence->node, head: &drv->fences);
96 spin_unlock_irqrestore(lock: &drv->lock, flags: irq_flags);
97
98 trace_dma_fence_emit(fence: &fence->f);
99
100 cmd_hdr->flags |= cpu_to_le32(VIRTIO_GPU_FLAG_FENCE);
101 cmd_hdr->fence_id = cpu_to_le64(fence->fence_id);
102
103 /* Only currently defined fence param. */
104 if (fence->emit_fence_info) {
105 cmd_hdr->flags |=
106 cpu_to_le32(VIRTIO_GPU_FLAG_INFO_RING_IDX);
107 cmd_hdr->ring_idx = (u8)fence->ring_idx;
108 }
109}
110
111void virtio_gpu_fence_event_process(struct virtio_gpu_device *vgdev,
112 u64 fence_id)
113{
114 struct virtio_gpu_fence_driver *drv = &vgdev->fence_drv;
115 struct virtio_gpu_fence *signaled, *curr, *tmp;
116 unsigned long irq_flags;
117
118 spin_lock_irqsave(&drv->lock, irq_flags);
119 atomic64_set(v: &vgdev->fence_drv.last_fence_id, i: fence_id);
120 list_for_each_entry_safe(curr, tmp, &drv->fences, node) {
121 if (fence_id != curr->fence_id)
122 continue;
123
124 signaled = curr;
125
126 /*
127 * Signal any fences with a strictly smaller sequence number
128 * than the current signaled fence.
129 */
130 list_for_each_entry_safe(curr, tmp, &drv->fences, node) {
131 /* dma-fence contexts must match */
132 if (signaled->f.context != curr->f.context)
133 continue;
134
135 if (!dma_fence_is_later(f1: &signaled->f, f2: &curr->f))
136 continue;
137
138 dma_fence_signal_locked(fence: &curr->f);
139 if (curr->e) {
140 drm_send_event(dev: vgdev->ddev, e: &curr->e->base);
141 curr->e = NULL;
142 }
143
144 list_del(entry: &curr->node);
145 dma_fence_put(fence: &curr->f);
146 }
147
148 dma_fence_signal_locked(fence: &signaled->f);
149 if (signaled->e) {
150 drm_send_event(dev: vgdev->ddev, e: &signaled->e->base);
151 signaled->e = NULL;
152 }
153
154 list_del(entry: &signaled->node);
155 dma_fence_put(fence: &signaled->f);
156 break;
157 }
158 spin_unlock_irqrestore(lock: &drv->lock, flags: irq_flags);
159}
160

source code of linux/drivers/gpu/drm/virtio/virtgpu_fence.c