1/*
2 * Copyright (C) 2015 Red Hat, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 */
25
26#ifndef VIRTIO_DRV_H
27#define VIRTIO_DRV_H
28
29#include <linux/dma-direction.h>
30#include <linux/virtio.h>
31#include <linux/virtio_ids.h>
32#include <linux/virtio_config.h>
33#include <linux/virtio_gpu.h>
34
35#include <drm/drm_atomic.h>
36#include <drm/drm_drv.h>
37#include <drm/drm_encoder.h>
38#include <drm/drm_fourcc.h>
39#include <drm/drm_framebuffer.h>
40#include <drm/drm_gem.h>
41#include <drm/drm_gem_shmem_helper.h>
42#include <drm/drm_ioctl.h>
43#include <drm/drm_probe_helper.h>
44#include <drm/virtgpu_drm.h>
45
46#define DRIVER_NAME "virtio_gpu"
47#define DRIVER_DESC "virtio GPU"
48
49#define DRIVER_MAJOR 0
50#define DRIVER_MINOR 1
51#define DRIVER_PATCHLEVEL 0
52
53#define STATE_INITIALIZING 0
54#define STATE_OK 1
55#define STATE_ERR 2
56
57#define MAX_CAPSET_ID 63
58#define MAX_RINGS 64
59
60/* See virtio_gpu_ctx_create. One additional character for NULL terminator. */
61#define DEBUG_NAME_MAX_LEN 65
62
63struct virtio_gpu_object_params {
64 unsigned long size;
65 bool dumb;
66 /* 3d */
67 bool virgl;
68 bool blob;
69
70 /* classic resources only */
71 uint32_t format;
72 uint32_t width;
73 uint32_t height;
74 uint32_t target;
75 uint32_t bind;
76 uint32_t depth;
77 uint32_t array_size;
78 uint32_t last_level;
79 uint32_t nr_samples;
80 uint32_t flags;
81
82 /* blob resources only */
83 uint32_t ctx_id;
84 uint32_t blob_mem;
85 uint32_t blob_flags;
86 uint64_t blob_id;
87};
88
89struct virtio_gpu_object {
90 struct drm_gem_shmem_object base;
91 struct sg_table *sgt;
92 uint32_t hw_res_handle;
93 bool dumb;
94 bool created;
95 bool attached;
96 bool host3d_blob, guest_blob;
97 uint32_t blob_mem, blob_flags;
98
99 int uuid_state;
100 uuid_t uuid;
101};
102#define gem_to_virtio_gpu_obj(gobj) \
103 container_of((gobj), struct virtio_gpu_object, base.base)
104
105struct virtio_gpu_object_shmem {
106 struct virtio_gpu_object base;
107};
108
109struct virtio_gpu_object_vram {
110 struct virtio_gpu_object base;
111 uint32_t map_state;
112 uint32_t map_info;
113 struct drm_mm_node vram_node;
114};
115
116#define to_virtio_gpu_shmem(virtio_gpu_object) \
117 container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base)
118
119#define to_virtio_gpu_vram(virtio_gpu_object) \
120 container_of((virtio_gpu_object), struct virtio_gpu_object_vram, base)
121
122struct virtio_gpu_object_array {
123 struct ww_acquire_ctx ticket;
124 struct list_head next;
125 u32 nents, total;
126 struct drm_gem_object *objs[] __counted_by(total);
127};
128
129struct virtio_gpu_vbuffer;
130struct virtio_gpu_device;
131
132typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
133 struct virtio_gpu_vbuffer *vbuf);
134
135struct virtio_gpu_fence_driver {
136 atomic64_t last_fence_id;
137 uint64_t current_fence_id;
138 uint64_t context;
139 struct list_head fences;
140 spinlock_t lock;
141};
142
143struct virtio_gpu_fence_event {
144 struct drm_pending_event base;
145 struct drm_event event;
146};
147
148struct virtio_gpu_fence {
149 struct dma_fence f;
150 uint32_t ring_idx;
151 uint64_t fence_id;
152 bool emit_fence_info;
153 struct virtio_gpu_fence_event *e;
154 struct virtio_gpu_fence_driver *drv;
155 struct list_head node;
156};
157
158struct virtio_gpu_vbuffer {
159 char *buf;
160 int size;
161
162 void *data_buf;
163 uint32_t data_size;
164
165 char *resp_buf;
166 int resp_size;
167 virtio_gpu_resp_cb resp_cb;
168 void *resp_cb_data;
169
170 struct virtio_gpu_object_array *objs;
171 struct list_head list;
172
173 uint32_t seqno;
174};
175
176struct virtio_gpu_output {
177 int index;
178 struct drm_crtc crtc;
179 struct drm_connector conn;
180 struct drm_encoder enc;
181 struct virtio_gpu_display_one info;
182 struct virtio_gpu_update_cursor cursor;
183 const struct drm_edid *drm_edid;
184 int cur_x;
185 int cur_y;
186 bool needs_modeset;
187};
188#define drm_crtc_to_virtio_gpu_output(x) \
189 container_of(x, struct virtio_gpu_output, crtc)
190
191struct virtio_gpu_framebuffer {
192 struct drm_framebuffer base;
193 struct virtio_gpu_fence *fence;
194};
195#define to_virtio_gpu_framebuffer(x) \
196 container_of(x, struct virtio_gpu_framebuffer, base)
197
198struct virtio_gpu_plane_state {
199 struct drm_plane_state base;
200 struct virtio_gpu_fence *fence;
201};
202#define to_virtio_gpu_plane_state(x) \
203 container_of(x, struct virtio_gpu_plane_state, base)
204
205struct virtio_gpu_queue {
206 struct virtqueue *vq;
207 spinlock_t qlock;
208 wait_queue_head_t ack_queue;
209 struct work_struct dequeue_work;
210 uint32_t seqno;
211};
212
213struct virtio_gpu_drv_capset {
214 uint32_t id;
215 uint32_t max_version;
216 uint32_t max_size;
217};
218
219struct virtio_gpu_drv_cap_cache {
220 struct list_head head;
221 void *caps_cache;
222 uint32_t id;
223 uint32_t version;
224 uint32_t size;
225 atomic_t is_valid;
226};
227
228struct virtio_gpu_device {
229 struct drm_device *ddev;
230
231 struct virtio_device *vdev;
232
233 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
234 uint32_t num_scanouts;
235
236 struct virtio_gpu_queue ctrlq;
237 struct virtio_gpu_queue cursorq;
238 struct kmem_cache *vbufs;
239
240 atomic_t pending_commands;
241
242 struct ida resource_ida;
243
244 wait_queue_head_t resp_wq;
245 /* current display info */
246 spinlock_t display_info_lock;
247 bool display_info_pending;
248
249 struct virtio_gpu_fence_driver fence_drv;
250
251 struct ida ctx_id_ida;
252
253 bool has_virgl_3d;
254 bool has_edid;
255 bool has_indirect;
256 bool has_resource_assign_uuid;
257 bool has_resource_blob;
258 bool has_host_visible;
259 bool has_context_init;
260 struct virtio_shm_region host_visible_region;
261 struct drm_mm host_visible_mm;
262
263 struct work_struct config_changed_work;
264
265 struct work_struct obj_free_work;
266 spinlock_t obj_free_lock;
267 struct list_head obj_free_list;
268
269 struct virtio_gpu_drv_capset *capsets;
270 uint32_t num_capsets;
271 uint64_t capset_id_mask;
272 struct list_head cap_cache;
273
274 /* protects uuid state when exporting */
275 spinlock_t resource_export_lock;
276 /* protects map state and host_visible_mm */
277 spinlock_t host_visible_lock;
278};
279
280struct virtio_gpu_fpriv {
281 uint32_t ctx_id;
282 uint32_t context_init;
283 bool context_created;
284 uint32_t num_rings;
285 uint64_t base_fence_ctx;
286 uint64_t ring_idx_mask;
287 struct mutex context_lock;
288 char debug_name[DEBUG_NAME_MAX_LEN];
289 bool explicit_debug_name;
290};
291
292/* virtgpu_ioctl.c */
293#define DRM_VIRTIO_NUM_IOCTLS 12
294extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
295void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file);
296
297/* virtgpu_kms.c */
298int virtio_gpu_init(struct virtio_device *vdev, struct drm_device *dev);
299void virtio_gpu_deinit(struct drm_device *dev);
300void virtio_gpu_release(struct drm_device *dev);
301int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
302void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
303
304/* virtgpu_gem.c */
305int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
306 struct drm_file *file);
307void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
308 struct drm_file *file);
309int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
310 struct drm_device *dev,
311 struct drm_mode_create_dumb *args);
312
313struct virtio_gpu_object_array *virtio_gpu_panic_array_alloc(void);
314struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents);
315struct virtio_gpu_object_array*
316virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents);
317void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs,
318 struct drm_gem_object *obj);
319int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs);
320void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs);
321void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs,
322 struct dma_fence *fence);
323void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs);
324void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev,
325 struct virtio_gpu_object_array *objs);
326void virtio_gpu_array_put_free_work(struct work_struct *work);
327
328/* virtgpu_vq.c */
329int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
330void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
331void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
332 struct virtio_gpu_object *bo,
333 struct virtio_gpu_object_params *params,
334 struct virtio_gpu_object_array *objs,
335 struct virtio_gpu_fence *fence);
336void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
337 struct virtio_gpu_object *bo);
338int virtio_gpu_panic_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
339 uint64_t offset,
340 uint32_t width, uint32_t height,
341 uint32_t x, uint32_t y,
342 struct virtio_gpu_object_array *objs);
343void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
344 uint64_t offset,
345 uint32_t width, uint32_t height,
346 uint32_t x, uint32_t y,
347 struct virtio_gpu_object_array *objs,
348 struct virtio_gpu_fence *fence);
349void virtio_gpu_panic_cmd_resource_flush(struct virtio_gpu_device *vgdev,
350 uint32_t resource_id,
351 uint32_t x, uint32_t y,
352 uint32_t width, uint32_t height);
353void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
354 uint32_t resource_id,
355 uint32_t x, uint32_t y,
356 uint32_t width, uint32_t height,
357 struct virtio_gpu_object_array *objs,
358 struct virtio_gpu_fence *fence);
359void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
360 uint32_t scanout_id, uint32_t resource_id,
361 uint32_t width, uint32_t height,
362 uint32_t x, uint32_t y);
363void virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
364 struct virtio_gpu_object *obj,
365 struct virtio_gpu_mem_entry *ents,
366 unsigned int nents);
367void virtio_gpu_object_detach(struct virtio_gpu_device *vgdev,
368 struct virtio_gpu_object *obj,
369 struct virtio_gpu_fence *fence);
370int virtio_gpu_detach_object_fenced(struct virtio_gpu_object *bo);
371void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
372 struct virtio_gpu_output *output);
373int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
374int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
375int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
376 int idx, int version,
377 struct virtio_gpu_drv_cap_cache **cache_p);
378int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev);
379void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
380 uint32_t context_init, uint32_t nlen,
381 const char *name);
382void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
383 uint32_t id);
384void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
385 uint32_t ctx_id,
386 struct virtio_gpu_object_array *objs);
387void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
388 uint32_t ctx_id,
389 struct virtio_gpu_object_array *objs);
390void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
391 void *data, uint32_t data_size,
392 uint32_t ctx_id,
393 struct virtio_gpu_object_array *objs,
394 struct virtio_gpu_fence *fence);
395void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
396 uint32_t ctx_id,
397 uint64_t offset, uint32_t level,
398 uint32_t stride,
399 uint32_t layer_stride,
400 struct drm_virtgpu_3d_box *box,
401 struct virtio_gpu_object_array *objs,
402 struct virtio_gpu_fence *fence);
403void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
404 uint32_t ctx_id,
405 uint64_t offset, uint32_t level,
406 uint32_t stride,
407 uint32_t layer_stride,
408 struct drm_virtgpu_3d_box *box,
409 struct virtio_gpu_object_array *objs,
410 struct virtio_gpu_fence *fence);
411void
412virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
413 struct virtio_gpu_object *bo,
414 struct virtio_gpu_object_params *params,
415 struct virtio_gpu_object_array *objs,
416 struct virtio_gpu_fence *fence);
417void virtio_gpu_ctrl_ack(struct virtqueue *vq);
418void virtio_gpu_cursor_ack(struct virtqueue *vq);
419void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
420void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
421void virtio_gpu_panic_notify(struct virtio_gpu_device *vgdev);
422void virtio_gpu_notify(struct virtio_gpu_device *vgdev);
423
424int
425virtio_gpu_cmd_resource_assign_uuid(struct virtio_gpu_device *vgdev,
426 struct virtio_gpu_object_array *objs);
427
428int virtio_gpu_cmd_map(struct virtio_gpu_device *vgdev,
429 struct virtio_gpu_object_array *objs, uint64_t offset);
430
431void virtio_gpu_cmd_unmap(struct virtio_gpu_device *vgdev,
432 struct virtio_gpu_object *bo);
433
434void
435virtio_gpu_cmd_resource_create_blob(struct virtio_gpu_device *vgdev,
436 struct virtio_gpu_object *bo,
437 struct virtio_gpu_object_params *params,
438 struct virtio_gpu_mem_entry *ents,
439 uint32_t nents);
440void
441virtio_gpu_cmd_set_scanout_blob(struct virtio_gpu_device *vgdev,
442 uint32_t scanout_id,
443 struct virtio_gpu_object *bo,
444 struct drm_framebuffer *fb,
445 uint32_t width, uint32_t height,
446 uint32_t x, uint32_t y);
447
448/* virtgpu_display.c */
449int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
450void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
451
452/* virtgpu_plane.c */
453uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
454struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
455 enum drm_plane_type type,
456 int index);
457
458/* virtgpu_fence.c */
459struct virtio_gpu_fence *virtio_gpu_fence_alloc(struct virtio_gpu_device *vgdev,
460 uint64_t base_fence_ctx,
461 uint32_t ring_idx);
462void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
463 struct virtio_gpu_ctrl_hdr *cmd_hdr,
464 struct virtio_gpu_fence *fence);
465void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
466 u64 fence_id);
467
468/* virtgpu_object.c */
469void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo);
470struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev,
471 size_t size);
472int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
473 struct virtio_gpu_object_params *params,
474 struct virtio_gpu_object **bo_ptr,
475 struct virtio_gpu_fence *fence);
476
477bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo);
478
479int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
480 uint32_t *resid);
481/* virtgpu_prime.c */
482int virtio_gpu_resource_assign_uuid(struct virtio_gpu_device *vgdev,
483 struct virtio_gpu_object *bo);
484struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj,
485 int flags);
486struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev,
487 struct dma_buf *buf);
488struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
489 struct drm_device *dev, struct dma_buf_attachment *attach,
490 struct sg_table *sgt);
491int virtgpu_dma_buf_import_sgt(struct virtio_gpu_mem_entry **ents,
492 unsigned int *nents,
493 struct virtio_gpu_object *bo,
494 struct dma_buf_attachment *attach);
495
496/* virtgpu_debugfs.c */
497void virtio_gpu_debugfs_init(struct drm_minor *minor);
498
499/* virtgpu_vram.c */
500bool virtio_gpu_is_vram(struct virtio_gpu_object *bo);
501int virtio_gpu_vram_create(struct virtio_gpu_device *vgdev,
502 struct virtio_gpu_object_params *params,
503 struct virtio_gpu_object **bo_ptr);
504struct sg_table *virtio_gpu_vram_map_dma_buf(struct virtio_gpu_object *bo,
505 struct device *dev,
506 enum dma_data_direction dir);
507void virtio_gpu_vram_unmap_dma_buf(struct device *dev,
508 struct sg_table *sgt,
509 enum dma_data_direction dir);
510
511/* virtgpu_submit.c */
512int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data,
513 struct drm_file *file);
514
515#endif
516

source code of linux/drivers/gpu/drm/virtio/virtgpu_drv.h