1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2016 Broadcom Limited
4 */
5
6/**
7 * DOC: VC4 DPI module
8 *
9 * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
10 * signals. On BCM2835, these can be routed out to GPIO0-27 with the
11 * ALT2 function.
12 */
13
14#include <drm/drm_atomic_helper.h>
15#include <drm/drm_bridge.h>
16#include <drm/drm_drv.h>
17#include <drm/drm_edid.h>
18#include <drm/drm_of.h>
19#include <drm/drm_panel.h>
20#include <drm/drm_print.h>
21#include <drm/drm_probe_helper.h>
22#include <drm/drm_simple_kms_helper.h>
23#include <linux/clk.h>
24#include <linux/component.h>
25#include <linux/media-bus-format.h>
26#include <linux/mod_devicetable.h>
27#include <linux/platform_device.h>
28#include "vc4_drv.h"
29#include "vc4_regs.h"
30
31#define DPI_C 0x00
32# define DPI_OUTPUT_ENABLE_MODE BIT(16)
33
34/* The order field takes the incoming 24 bit RGB from the pixel valve
35 * and shuffles the 3 channels.
36 */
37# define DPI_ORDER_MASK VC4_MASK(15, 14)
38# define DPI_ORDER_SHIFT 14
39# define DPI_ORDER_RGB 0
40# define DPI_ORDER_BGR 1
41# define DPI_ORDER_GRB 2
42# define DPI_ORDER_BRG 3
43
44/* The format field takes the ORDER-shuffled pixel valve data and
45 * formats it onto the output lines.
46 */
47# define DPI_FORMAT_MASK VC4_MASK(13, 11)
48# define DPI_FORMAT_SHIFT 11
49/* This define is named in the hardware, but actually just outputs 0. */
50# define DPI_FORMAT_9BIT_666_RGB 0
51/* Outputs 00000000rrrrrggggggbbbbb */
52# define DPI_FORMAT_16BIT_565_RGB_1 1
53/* Outputs 000rrrrr00gggggg000bbbbb */
54# define DPI_FORMAT_16BIT_565_RGB_2 2
55/* Outputs 00rrrrr000gggggg00bbbbb0 */
56# define DPI_FORMAT_16BIT_565_RGB_3 3
57/* Outputs 000000rrrrrrggggggbbbbbb */
58# define DPI_FORMAT_18BIT_666_RGB_1 4
59/* Outputs 00rrrrrr00gggggg00bbbbbb */
60# define DPI_FORMAT_18BIT_666_RGB_2 5
61/* Outputs rrrrrrrrggggggggbbbbbbbb */
62# define DPI_FORMAT_24BIT_888_RGB 6
63
64/* Reverses the polarity of the corresponding signal */
65# define DPI_PIXEL_CLK_INVERT BIT(10)
66# define DPI_HSYNC_INVERT BIT(9)
67# define DPI_VSYNC_INVERT BIT(8)
68# define DPI_OUTPUT_ENABLE_INVERT BIT(7)
69
70/* Outputs the signal the falling clock edge instead of rising. */
71# define DPI_HSYNC_NEGATE BIT(6)
72# define DPI_VSYNC_NEGATE BIT(5)
73# define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
74
75/* Disables the signal */
76# define DPI_HSYNC_DISABLE BIT(3)
77# define DPI_VSYNC_DISABLE BIT(2)
78# define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
79
80/* Power gate to the device, full reset at 0 -> 1 transition */
81# define DPI_ENABLE BIT(0)
82
83/* All other registers besides DPI_C return the ID */
84#define DPI_ID 0x04
85# define DPI_ID_VALUE 0x00647069
86
87/* General DPI hardware state. */
88struct vc4_dpi {
89 struct vc4_encoder encoder;
90
91 struct platform_device *pdev;
92
93 void __iomem *regs;
94
95 struct clk *pixel_clock;
96 struct clk *core_clock;
97
98 struct debugfs_regset32 regset;
99};
100
101#define to_vc4_dpi(_encoder) \
102 container_of_const(_encoder, struct vc4_dpi, encoder.base)
103
104#define DPI_READ(offset) \
105 ({ \
106 kunit_fail_current_test("Accessing a register in a unit test!\n"); \
107 readl(dpi->regs + (offset)); \
108 })
109
110#define DPI_WRITE(offset, val) \
111 do { \
112 kunit_fail_current_test("Accessing a register in a unit test!\n"); \
113 writel(val, dpi->regs + (offset)); \
114 } while (0)
115
116static const struct debugfs_reg32 dpi_regs[] = {
117 VC4_REG32(DPI_C),
118 VC4_REG32(DPI_ID),
119};
120
121static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
122{
123 struct drm_device *dev = encoder->dev;
124 struct vc4_dpi *dpi = to_vc4_dpi(encoder);
125 int idx;
126
127 if (!drm_dev_enter(dev, idx: &idx))
128 return;
129
130 clk_disable_unprepare(clk: dpi->pixel_clock);
131
132 drm_dev_exit(idx);
133}
134
135static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
136{
137 struct drm_device *dev = encoder->dev;
138 struct drm_display_mode *mode = &encoder->crtc->mode;
139 struct vc4_dpi *dpi = to_vc4_dpi(encoder);
140 struct drm_connector_list_iter conn_iter;
141 struct drm_connector *connector = NULL, *connector_scan;
142 u32 dpi_c = DPI_ENABLE;
143 int idx;
144 int ret;
145
146 /* Look up the connector attached to DPI so we can get the
147 * bus_format. Ideally the bridge would tell us the
148 * bus_format we want, but it doesn't yet, so assume that it's
149 * uniform throughout the bridge chain.
150 */
151 drm_connector_list_iter_begin(dev, iter: &conn_iter);
152 drm_for_each_connector_iter(connector_scan, &conn_iter) {
153 if (connector_scan->encoder == encoder) {
154 connector = connector_scan;
155 break;
156 }
157 }
158 drm_connector_list_iter_end(iter: &conn_iter);
159
160 /* Default to 18bit if no connector or format found. */
161 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, DPI_FORMAT);
162
163 if (connector) {
164 if (connector->display_info.num_bus_formats) {
165 u32 bus_format = connector->display_info.bus_formats[0];
166
167 dpi_c &= ~DPI_FORMAT_MASK;
168
169 switch (bus_format) {
170 case MEDIA_BUS_FMT_RGB888_1X24:
171 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
172 DPI_FORMAT);
173 break;
174 case MEDIA_BUS_FMT_BGR888_1X24:
175 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
176 DPI_FORMAT);
177 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
178 DPI_ORDER);
179 break;
180 case MEDIA_BUS_FMT_BGR666_1X24_CPADHI:
181 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
182 fallthrough;
183 case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
184 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
185 DPI_FORMAT);
186 break;
187 case MEDIA_BUS_FMT_BGR666_1X18:
188 dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
189 fallthrough;
190 case MEDIA_BUS_FMT_RGB666_1X18:
191 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
192 DPI_FORMAT);
193 break;
194 case MEDIA_BUS_FMT_RGB565_1X16:
195 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1,
196 DPI_FORMAT);
197 break;
198 case MEDIA_BUS_FMT_RGB565_1X24_CPADHI:
199 dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_2,
200 DPI_FORMAT);
201 break;
202 default:
203 drm_err(dev, "Unknown media bus format %d\n",
204 bus_format);
205 break;
206 }
207 }
208
209 if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
210 dpi_c |= DPI_PIXEL_CLK_INVERT;
211
212 if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
213 dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
214 }
215
216 if (mode->flags & DRM_MODE_FLAG_CSYNC) {
217 if (mode->flags & DRM_MODE_FLAG_NCSYNC)
218 dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
219 } else {
220 dpi_c |= DPI_OUTPUT_ENABLE_MODE;
221
222 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
223 dpi_c |= DPI_HSYNC_INVERT;
224 else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
225 dpi_c |= DPI_HSYNC_DISABLE;
226
227 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
228 dpi_c |= DPI_VSYNC_INVERT;
229 else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
230 dpi_c |= DPI_VSYNC_DISABLE;
231 }
232
233 if (!drm_dev_enter(dev, idx: &idx))
234 return;
235
236 DPI_WRITE(DPI_C, dpi_c);
237
238 ret = clk_set_rate(clk: dpi->pixel_clock, rate: mode->clock * 1000);
239 if (ret)
240 drm_err(dev, "Failed to set clock rate: %d\n", ret);
241
242 ret = clk_prepare_enable(clk: dpi->pixel_clock);
243 if (ret)
244 drm_err(dev, "Failed to set clock rate: %d\n", ret);
245
246 drm_dev_exit(idx);
247}
248
249static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
250 const struct drm_display_mode *mode)
251{
252 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
253 return MODE_NO_INTERLACE;
254
255 return MODE_OK;
256}
257
258static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
259 .disable = vc4_dpi_encoder_disable,
260 .enable = vc4_dpi_encoder_enable,
261 .mode_valid = vc4_dpi_encoder_mode_valid,
262};
263
264static int vc4_dpi_late_register(struct drm_encoder *encoder)
265{
266 struct drm_device *drm = encoder->dev;
267 struct vc4_dpi *dpi = to_vc4_dpi(encoder);
268
269 vc4_debugfs_add_regset32(drm, filename: "dpi_regs", regset: &dpi->regset);
270
271 return 0;
272}
273
274static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
275 .late_register = vc4_dpi_late_register,
276};
277
278static const struct of_device_id vc4_dpi_dt_match[] = {
279 { .compatible = "brcm,bcm2835-dpi", .data = NULL },
280 {}
281};
282
283/* Sets up the next link in the display chain, whether it's a panel or
284 * a bridge.
285 */
286static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
287{
288 struct drm_device *drm = dpi->encoder.base.dev;
289 struct device *dev = &dpi->pdev->dev;
290 struct drm_bridge *bridge;
291
292 bridge = drmm_of_get_bridge(drm, node: dev->of_node, port: 0, endpoint: 0);
293 if (IS_ERR(ptr: bridge)) {
294 /* If nothing was connected in the DT, that's not an
295 * error.
296 */
297 if (PTR_ERR(ptr: bridge) == -ENODEV)
298 return 0;
299 else
300 return PTR_ERR(ptr: bridge);
301 }
302
303 return drm_bridge_attach(encoder: &dpi->encoder.base, bridge, NULL, flags: 0);
304}
305
306static void vc4_dpi_disable_clock(void *ptr)
307{
308 struct vc4_dpi *dpi = ptr;
309
310 clk_disable_unprepare(clk: dpi->core_clock);
311}
312
313static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
314{
315 struct platform_device *pdev = to_platform_device(dev);
316 struct drm_device *drm = dev_get_drvdata(dev: master);
317 struct vc4_dpi *dpi;
318 int ret;
319
320 dpi = drmm_kzalloc(dev: drm, size: sizeof(*dpi), GFP_KERNEL);
321 if (!dpi)
322 return -ENOMEM;
323
324 dpi->encoder.type = VC4_ENCODER_TYPE_DPI;
325 dpi->pdev = pdev;
326 dpi->regs = vc4_ioremap_regs(dev: pdev, index: 0);
327 if (IS_ERR(ptr: dpi->regs))
328 return PTR_ERR(ptr: dpi->regs);
329 dpi->regset.base = dpi->regs;
330 dpi->regset.regs = dpi_regs;
331 dpi->regset.nregs = ARRAY_SIZE(dpi_regs);
332
333 if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
334 dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
335 DPI_READ(DPI_ID), DPI_ID_VALUE);
336 return -ENODEV;
337 }
338
339 dpi->core_clock = devm_clk_get(dev, id: "core");
340 if (IS_ERR(ptr: dpi->core_clock)) {
341 ret = PTR_ERR(ptr: dpi->core_clock);
342 if (ret != -EPROBE_DEFER)
343 drm_err(drm, "Failed to get core clock: %d\n", ret);
344 return ret;
345 }
346
347 dpi->pixel_clock = devm_clk_get(dev, id: "pixel");
348 if (IS_ERR(ptr: dpi->pixel_clock)) {
349 ret = PTR_ERR(ptr: dpi->pixel_clock);
350 if (ret != -EPROBE_DEFER)
351 drm_err(drm, "Failed to get pixel clock: %d\n", ret);
352 return ret;
353 }
354
355 ret = clk_prepare_enable(clk: dpi->core_clock);
356 if (ret) {
357 drm_err(drm, "Failed to turn on core clock: %d\n", ret);
358 return ret;
359 }
360
361 ret = devm_add_action_or_reset(dev, vc4_dpi_disable_clock, dpi);
362 if (ret)
363 return ret;
364
365 ret = drmm_encoder_init(dev: drm, encoder: &dpi->encoder.base,
366 funcs: &vc4_dpi_encoder_funcs,
367 DRM_MODE_ENCODER_DPI,
368 NULL);
369 if (ret)
370 return ret;
371
372 drm_encoder_helper_add(encoder: &dpi->encoder.base, funcs: &vc4_dpi_encoder_helper_funcs);
373
374 ret = vc4_dpi_init_bridge(dpi);
375 if (ret)
376 return ret;
377
378 dev_set_drvdata(dev, data: dpi);
379
380 return 0;
381}
382
383static const struct component_ops vc4_dpi_ops = {
384 .bind = vc4_dpi_bind,
385};
386
387static int vc4_dpi_dev_probe(struct platform_device *pdev)
388{
389 return component_add(&pdev->dev, &vc4_dpi_ops);
390}
391
392static void vc4_dpi_dev_remove(struct platform_device *pdev)
393{
394 component_del(&pdev->dev, &vc4_dpi_ops);
395}
396
397struct platform_driver vc4_dpi_driver = {
398 .probe = vc4_dpi_dev_probe,
399 .remove = vc4_dpi_dev_remove,
400 .driver = {
401 .name = "vc4_dpi",
402 .of_match_table = vc4_dpi_dt_match,
403 },
404};
405

source code of linux/drivers/gpu/drm/vc4/vc4_dpi.c