1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2020 Intel Corporation
4 */
5
6#ifndef _INTEL_DDI_BUF_TRANS_H_
7#define _INTEL_DDI_BUF_TRANS_H_
8
9#include <linux/types.h>
10
11struct intel_encoder;
12struct intel_crtc_state;
13
14struct hsw_ddi_buf_trans {
15 u32 trans1; /* balance leg enable, de-emph level */
16 u32 trans2; /* vref sel, vswing */
17 u8 i_boost; /* SKL: I_boost; valid: 0x0, 0x1, 0x3, 0x7 */
18};
19
20struct bxt_ddi_buf_trans {
21 u8 margin; /* swing value */
22 u8 scale; /* scale value */
23 u8 enable; /* scale enable */
24 u8 deemphasis;
25};
26
27struct icl_ddi_buf_trans {
28 u8 dw2_swing_sel;
29 u8 dw7_n_scalar;
30 u8 dw4_cursor_coeff;
31 u8 dw4_post_cursor_2;
32 u8 dw4_post_cursor_1;
33};
34
35struct icl_mg_phy_ddi_buf_trans {
36 u8 cri_txdeemph_override_11_6;
37 u8 cri_txdeemph_override_5_0;
38 u8 cri_txdeemph_override_17_12;
39};
40
41struct tgl_dkl_phy_ddi_buf_trans {
42 u8 vswing;
43 u8 preshoot;
44 u8 de_emphasis;
45};
46
47struct dg2_snps_phy_buf_trans {
48 u8 vswing;
49 u8 pre_cursor;
50 u8 post_cursor;
51};
52
53struct xe3plpd_lt_phy_buf_trans {
54 u8 txswing;
55 u8 txswing_level;
56 u8 pre_cursor;
57 u8 main_cursor;
58 u8 post_cursor;
59};
60
61union intel_ddi_buf_trans_entry {
62 struct hsw_ddi_buf_trans hsw;
63 struct bxt_ddi_buf_trans bxt;
64 struct icl_ddi_buf_trans icl;
65 struct icl_mg_phy_ddi_buf_trans mg;
66 struct tgl_dkl_phy_ddi_buf_trans dkl;
67 struct dg2_snps_phy_buf_trans snps;
68 struct xe3plpd_lt_phy_buf_trans lt;
69};
70
71struct intel_ddi_buf_trans {
72 const union intel_ddi_buf_trans_entry *entries;
73 u8 num_entries;
74 u8 hdmi_default_entry;
75};
76
77bool is_hobl_buf_trans(const struct intel_ddi_buf_trans *table);
78
79void intel_ddi_buf_trans_init(struct intel_encoder *encoder);
80
81#endif
82

source code of linux/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.h