| 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (c) 2018, The Linux Foundation. All rights reserved. |
| 4 | * Copyright (c) 2019-2020. Linaro Limited. |
| 5 | */ |
| 6 | |
| 7 | #include <linux/gpio/consumer.h> |
| 8 | #include <linux/i2c.h> |
| 9 | #include <linux/interrupt.h> |
| 10 | #include <linux/media-bus-format.h> |
| 11 | #include <linux/module.h> |
| 12 | #include <linux/of_graph.h> |
| 13 | #include <linux/platform_device.h> |
| 14 | #include <linux/regmap.h> |
| 15 | #include <linux/regulator/consumer.h> |
| 16 | |
| 17 | #include <sound/hdmi-codec.h> |
| 18 | |
| 19 | #include <drm/drm_atomic_helper.h> |
| 20 | #include <drm/drm_bridge.h> |
| 21 | #include <drm/drm_edid.h> |
| 22 | #include <drm/drm_mipi_dsi.h> |
| 23 | #include <drm/drm_of.h> |
| 24 | #include <drm/drm_print.h> |
| 25 | #include <drm/drm_probe_helper.h> |
| 26 | #include <drm/display/drm_hdmi_helper.h> |
| 27 | #include <drm/display/drm_hdmi_state_helper.h> |
| 28 | |
| 29 | #define EDID_SEG_SIZE 256 |
| 30 | #define EDID_LEN 32 |
| 31 | #define EDID_LOOP 8 |
| 32 | #define KEY_DDC_ACCS_DONE 0x02 |
| 33 | #define DDC_NO_ACK 0x50 |
| 34 | |
| 35 | #define LT9611_4LANES 0 |
| 36 | |
| 37 | struct lt9611 { |
| 38 | struct device *dev; |
| 39 | struct drm_bridge bridge; |
| 40 | struct drm_bridge *next_bridge; |
| 41 | |
| 42 | struct regmap *regmap; |
| 43 | |
| 44 | struct device_node *dsi0_node; |
| 45 | struct device_node *dsi1_node; |
| 46 | struct mipi_dsi_device *dsi0; |
| 47 | struct mipi_dsi_device *dsi1; |
| 48 | |
| 49 | bool ac_mode; |
| 50 | |
| 51 | struct gpio_desc *reset_gpio; |
| 52 | struct gpio_desc *enable_gpio; |
| 53 | |
| 54 | bool power_on; |
| 55 | bool sleep; |
| 56 | |
| 57 | struct regulator_bulk_data supplies[2]; |
| 58 | |
| 59 | struct i2c_client *client; |
| 60 | |
| 61 | enum drm_connector_status status; |
| 62 | |
| 63 | u8 edid_buf[EDID_SEG_SIZE]; |
| 64 | }; |
| 65 | |
| 66 | #define LT9611_PAGE_CONTROL 0xff |
| 67 | |
| 68 | static const struct regmap_range_cfg lt9611_ranges[] = { |
| 69 | { |
| 70 | .name = "register_range" , |
| 71 | .range_min = 0, |
| 72 | .range_max = 0x85ff, |
| 73 | .selector_reg = LT9611_PAGE_CONTROL, |
| 74 | .selector_mask = 0xff, |
| 75 | .selector_shift = 0, |
| 76 | .window_start = 0, |
| 77 | .window_len = 0x100, |
| 78 | }, |
| 79 | }; |
| 80 | |
| 81 | static const struct regmap_config lt9611_regmap_config = { |
| 82 | .reg_bits = 8, |
| 83 | .val_bits = 8, |
| 84 | .max_register = 0xffff, |
| 85 | .ranges = lt9611_ranges, |
| 86 | .num_ranges = ARRAY_SIZE(lt9611_ranges), |
| 87 | }; |
| 88 | |
| 89 | static struct lt9611 *bridge_to_lt9611(struct drm_bridge *bridge) |
| 90 | { |
| 91 | return container_of(bridge, struct lt9611, bridge); |
| 92 | } |
| 93 | |
| 94 | static int lt9611_mipi_input_analog(struct lt9611 *lt9611) |
| 95 | { |
| 96 | const struct reg_sequence reg_cfg[] = { |
| 97 | { 0x8106, 0x40 }, /* port A rx current */ |
| 98 | { 0x810a, 0xfe }, /* port A ldo voltage set */ |
| 99 | { 0x810b, 0xbf }, /* enable port A lprx */ |
| 100 | { 0x8111, 0x40 }, /* port B rx current */ |
| 101 | { 0x8115, 0xfe }, /* port B ldo voltage set */ |
| 102 | { 0x8116, 0xbf }, /* enable port B lprx */ |
| 103 | |
| 104 | { 0x811c, 0x03 }, /* PortA clk lane no-LP mode */ |
| 105 | { 0x8120, 0x03 }, /* PortB clk lane with-LP mode */ |
| 106 | }; |
| 107 | |
| 108 | return regmap_multi_reg_write(map: lt9611->regmap, regs: reg_cfg, ARRAY_SIZE(reg_cfg)); |
| 109 | } |
| 110 | |
| 111 | static int lt9611_mipi_input_digital(struct lt9611 *lt9611, |
| 112 | const struct drm_display_mode *mode) |
| 113 | { |
| 114 | struct reg_sequence reg_cfg[] = { |
| 115 | { 0x8300, LT9611_4LANES }, |
| 116 | { 0x830a, 0x00 }, |
| 117 | { 0x824f, 0x80 }, |
| 118 | { 0x8250, 0x10 }, |
| 119 | { 0x8302, 0x0a }, |
| 120 | { 0x8306, 0x0a }, |
| 121 | }; |
| 122 | |
| 123 | if (lt9611->dsi1_node) |
| 124 | reg_cfg[1].def = 0x03; |
| 125 | |
| 126 | return regmap_multi_reg_write(map: lt9611->regmap, regs: reg_cfg, ARRAY_SIZE(reg_cfg)); |
| 127 | } |
| 128 | |
| 129 | static void lt9611_mipi_video_setup(struct lt9611 *lt9611, |
| 130 | const struct drm_display_mode *mode) |
| 131 | { |
| 132 | u32 h_total, hactive, hsync_len, hfront_porch, hsync_porch; |
| 133 | u32 v_total, vactive, vsync_len, vfront_porch, vsync_porch; |
| 134 | |
| 135 | h_total = mode->htotal; |
| 136 | v_total = mode->vtotal; |
| 137 | |
| 138 | hactive = mode->hdisplay; |
| 139 | hsync_len = mode->hsync_end - mode->hsync_start; |
| 140 | hfront_porch = mode->hsync_start - mode->hdisplay; |
| 141 | hsync_porch = mode->htotal - mode->hsync_start; |
| 142 | |
| 143 | vactive = mode->vdisplay; |
| 144 | vsync_len = mode->vsync_end - mode->vsync_start; |
| 145 | vfront_porch = mode->vsync_start - mode->vdisplay; |
| 146 | vsync_porch = mode->vtotal - mode->vsync_start; |
| 147 | |
| 148 | regmap_write(map: lt9611->regmap, reg: 0x830d, val: (u8)(v_total / 256)); |
| 149 | regmap_write(map: lt9611->regmap, reg: 0x830e, val: (u8)(v_total % 256)); |
| 150 | |
| 151 | regmap_write(map: lt9611->regmap, reg: 0x830f, val: (u8)(vactive / 256)); |
| 152 | regmap_write(map: lt9611->regmap, reg: 0x8310, val: (u8)(vactive % 256)); |
| 153 | |
| 154 | regmap_write(map: lt9611->regmap, reg: 0x8311, val: (u8)(h_total / 256)); |
| 155 | regmap_write(map: lt9611->regmap, reg: 0x8312, val: (u8)(h_total % 256)); |
| 156 | |
| 157 | regmap_write(map: lt9611->regmap, reg: 0x8313, val: (u8)(hactive / 256)); |
| 158 | regmap_write(map: lt9611->regmap, reg: 0x8314, val: (u8)(hactive % 256)); |
| 159 | |
| 160 | regmap_write(map: lt9611->regmap, reg: 0x8315, val: (u8)(vsync_len % 256)); |
| 161 | regmap_write(map: lt9611->regmap, reg: 0x8316, val: (u8)(hsync_len % 256)); |
| 162 | |
| 163 | regmap_write(map: lt9611->regmap, reg: 0x8317, val: (u8)(vfront_porch % 256)); |
| 164 | |
| 165 | regmap_write(map: lt9611->regmap, reg: 0x8318, val: (u8)(vsync_porch % 256)); |
| 166 | |
| 167 | regmap_write(map: lt9611->regmap, reg: 0x8319, val: (u8)(hfront_porch % 256)); |
| 168 | |
| 169 | regmap_write(map: lt9611->regmap, reg: 0x831a, val: (u8)(hsync_porch / 256) | |
| 170 | ((hfront_porch / 256) << 4)); |
| 171 | regmap_write(map: lt9611->regmap, reg: 0x831b, val: (u8)(hsync_porch % 256)); |
| 172 | } |
| 173 | |
| 174 | static void lt9611_pcr_setup(struct lt9611 *lt9611, const struct drm_display_mode *mode, unsigned int postdiv) |
| 175 | { |
| 176 | unsigned int pcr_m = mode->clock * 5 * postdiv / 27000; |
| 177 | const struct reg_sequence reg_cfg[] = { |
| 178 | { 0x830b, 0x01 }, |
| 179 | { 0x830c, 0x10 }, |
| 180 | { 0x8348, 0x00 }, |
| 181 | { 0x8349, 0x81 }, |
| 182 | |
| 183 | /* stage 1 */ |
| 184 | { 0x8321, 0x4a }, |
| 185 | { 0x8324, 0x71 }, |
| 186 | { 0x8325, 0x30 }, |
| 187 | { 0x832a, 0x01 }, |
| 188 | |
| 189 | /* stage 2 */ |
| 190 | { 0x834a, 0x40 }, |
| 191 | |
| 192 | /* MK limit */ |
| 193 | { 0x832d, 0x38 }, |
| 194 | { 0x8331, 0x08 }, |
| 195 | }; |
| 196 | u8 pol = 0x10; |
| 197 | |
| 198 | if (mode->flags & DRM_MODE_FLAG_NHSYNC) |
| 199 | pol |= 0x2; |
| 200 | if (mode->flags & DRM_MODE_FLAG_NVSYNC) |
| 201 | pol |= 0x1; |
| 202 | regmap_write(map: lt9611->regmap, reg: 0x831d, val: pol); |
| 203 | |
| 204 | regmap_multi_reg_write(map: lt9611->regmap, regs: reg_cfg, ARRAY_SIZE(reg_cfg)); |
| 205 | if (lt9611->dsi1_node) { |
| 206 | unsigned int hact = mode->hdisplay; |
| 207 | |
| 208 | hact >>= 2; |
| 209 | hact += 0x50; |
| 210 | hact = min(hact, 0x3e0U); |
| 211 | regmap_write(map: lt9611->regmap, reg: 0x830b, val: hact / 256); |
| 212 | regmap_write(map: lt9611->regmap, reg: 0x830c, val: hact % 256); |
| 213 | regmap_write(map: lt9611->regmap, reg: 0x8348, val: hact / 256); |
| 214 | regmap_write(map: lt9611->regmap, reg: 0x8349, val: hact % 256); |
| 215 | } |
| 216 | |
| 217 | regmap_write(map: lt9611->regmap, reg: 0x8326, val: pcr_m); |
| 218 | |
| 219 | /* pcr rst */ |
| 220 | regmap_write(map: lt9611->regmap, reg: 0x8011, val: 0x5a); |
| 221 | regmap_write(map: lt9611->regmap, reg: 0x8011, val: 0xfa); |
| 222 | } |
| 223 | |
| 224 | static int lt9611_pll_setup(struct lt9611 *lt9611, const struct drm_display_mode *mode, unsigned int *postdiv) |
| 225 | { |
| 226 | unsigned int pclk = mode->clock; |
| 227 | const struct reg_sequence reg_cfg[] = { |
| 228 | /* txpll init */ |
| 229 | { 0x8123, 0x40 }, |
| 230 | { 0x8124, 0x64 }, |
| 231 | { 0x8125, 0x80 }, |
| 232 | { 0x8126, 0x55 }, |
| 233 | { 0x812c, 0x37 }, |
| 234 | { 0x812f, 0x01 }, |
| 235 | { 0x8126, 0x55 }, |
| 236 | { 0x8127, 0x66 }, |
| 237 | { 0x8128, 0x88 }, |
| 238 | { 0x812a, 0x20 }, |
| 239 | }; |
| 240 | |
| 241 | regmap_multi_reg_write(map: lt9611->regmap, regs: reg_cfg, ARRAY_SIZE(reg_cfg)); |
| 242 | |
| 243 | if (pclk > 150000) { |
| 244 | regmap_write(map: lt9611->regmap, reg: 0x812d, val: 0x88); |
| 245 | *postdiv = 1; |
| 246 | } else if (pclk > 70000) { |
| 247 | regmap_write(map: lt9611->regmap, reg: 0x812d, val: 0x99); |
| 248 | *postdiv = 2; |
| 249 | } else { |
| 250 | regmap_write(map: lt9611->regmap, reg: 0x812d, val: 0xaa); |
| 251 | *postdiv = 4; |
| 252 | } |
| 253 | |
| 254 | /* |
| 255 | * first divide pclk by 2 first |
| 256 | * - write divide by 64k to 19:16 bits which means shift by 17 |
| 257 | * - write divide by 256 to 15:8 bits which means shift by 9 |
| 258 | * - write remainder to 7:0 bits, which means shift by 1 |
| 259 | */ |
| 260 | regmap_write(map: lt9611->regmap, reg: 0x82e3, val: pclk >> 17); /* pclk[19:16] */ |
| 261 | regmap_write(map: lt9611->regmap, reg: 0x82e4, val: pclk >> 9); /* pclk[15:8] */ |
| 262 | regmap_write(map: lt9611->regmap, reg: 0x82e5, val: pclk >> 1); /* pclk[7:0] */ |
| 263 | |
| 264 | regmap_write(map: lt9611->regmap, reg: 0x82de, val: 0x20); |
| 265 | regmap_write(map: lt9611->regmap, reg: 0x82de, val: 0xe0); |
| 266 | |
| 267 | regmap_write(map: lt9611->regmap, reg: 0x8016, val: 0xf1); |
| 268 | regmap_write(map: lt9611->regmap, reg: 0x8016, val: 0xf3); |
| 269 | |
| 270 | return 0; |
| 271 | } |
| 272 | |
| 273 | static int lt9611_read_video_check(struct lt9611 *lt9611, unsigned int reg) |
| 274 | { |
| 275 | unsigned int temp, temp2; |
| 276 | int ret; |
| 277 | |
| 278 | ret = regmap_read(map: lt9611->regmap, reg, val: &temp); |
| 279 | if (ret) |
| 280 | return ret; |
| 281 | temp <<= 8; |
| 282 | ret = regmap_read(map: lt9611->regmap, reg: reg + 1, val: &temp2); |
| 283 | if (ret) |
| 284 | return ret; |
| 285 | |
| 286 | return (temp + temp2); |
| 287 | } |
| 288 | |
| 289 | static int lt9611_video_check(struct lt9611 *lt9611) |
| 290 | { |
| 291 | u32 v_total, vactive, hactive_a, hactive_b, h_total_sysclk; |
| 292 | int temp; |
| 293 | |
| 294 | /* top module video check */ |
| 295 | |
| 296 | /* vactive */ |
| 297 | temp = lt9611_read_video_check(lt9611, reg: 0x8282); |
| 298 | if (temp < 0) |
| 299 | goto end; |
| 300 | vactive = temp; |
| 301 | |
| 302 | /* v_total */ |
| 303 | temp = lt9611_read_video_check(lt9611, reg: 0x826c); |
| 304 | if (temp < 0) |
| 305 | goto end; |
| 306 | v_total = temp; |
| 307 | |
| 308 | /* h_total_sysclk */ |
| 309 | temp = lt9611_read_video_check(lt9611, reg: 0x8286); |
| 310 | if (temp < 0) |
| 311 | goto end; |
| 312 | h_total_sysclk = temp; |
| 313 | |
| 314 | /* hactive_a */ |
| 315 | temp = lt9611_read_video_check(lt9611, reg: 0x8382); |
| 316 | if (temp < 0) |
| 317 | goto end; |
| 318 | hactive_a = temp / 3; |
| 319 | |
| 320 | /* hactive_b */ |
| 321 | temp = lt9611_read_video_check(lt9611, reg: 0x8386); |
| 322 | if (temp < 0) |
| 323 | goto end; |
| 324 | hactive_b = temp / 3; |
| 325 | |
| 326 | dev_info(lt9611->dev, |
| 327 | "video check: hactive_a=%d, hactive_b=%d, vactive=%d, v_total=%d, h_total_sysclk=%d\n" , |
| 328 | hactive_a, hactive_b, vactive, v_total, h_total_sysclk); |
| 329 | |
| 330 | return 0; |
| 331 | |
| 332 | end: |
| 333 | dev_err(lt9611->dev, "read video check error\n" ); |
| 334 | return temp; |
| 335 | } |
| 336 | |
| 337 | static void lt9611_hdmi_tx_digital(struct lt9611 *lt9611, bool is_hdmi) |
| 338 | { |
| 339 | if (is_hdmi) |
| 340 | regmap_write(map: lt9611->regmap, reg: 0x82d6, val: 0x8c); |
| 341 | else |
| 342 | regmap_write(map: lt9611->regmap, reg: 0x82d6, val: 0x0c); |
| 343 | regmap_write(map: lt9611->regmap, reg: 0x82d7, val: 0x04); |
| 344 | } |
| 345 | |
| 346 | static void lt9611_hdmi_tx_phy(struct lt9611 *lt9611) |
| 347 | { |
| 348 | struct reg_sequence reg_cfg[] = { |
| 349 | { 0x8130, 0x6a }, |
| 350 | { 0x8131, 0x44 }, /* HDMI DC mode */ |
| 351 | { 0x8132, 0x4a }, |
| 352 | { 0x8133, 0x0b }, |
| 353 | { 0x8134, 0x00 }, |
| 354 | { 0x8135, 0x00 }, |
| 355 | { 0x8136, 0x00 }, |
| 356 | { 0x8137, 0x44 }, |
| 357 | { 0x813f, 0x0f }, |
| 358 | { 0x8140, 0xa0 }, |
| 359 | { 0x8141, 0xa0 }, |
| 360 | { 0x8142, 0xa0 }, |
| 361 | { 0x8143, 0xa0 }, |
| 362 | { 0x8144, 0x0a }, |
| 363 | }; |
| 364 | |
| 365 | /* HDMI AC mode */ |
| 366 | if (lt9611->ac_mode) |
| 367 | reg_cfg[2].def = 0x73; |
| 368 | |
| 369 | regmap_multi_reg_write(map: lt9611->regmap, regs: reg_cfg, ARRAY_SIZE(reg_cfg)); |
| 370 | } |
| 371 | |
| 372 | static irqreturn_t lt9611_irq_thread_handler(int irq, void *dev_id) |
| 373 | { |
| 374 | struct lt9611 *lt9611 = dev_id; |
| 375 | unsigned int irq_flag0 = 0; |
| 376 | unsigned int irq_flag3 = 0; |
| 377 | |
| 378 | regmap_read(map: lt9611->regmap, reg: 0x820f, val: &irq_flag3); |
| 379 | regmap_read(map: lt9611->regmap, reg: 0x820c, val: &irq_flag0); |
| 380 | |
| 381 | /* hpd changed low */ |
| 382 | if (irq_flag3 & 0x80) { |
| 383 | dev_info(lt9611->dev, "hdmi cable disconnected\n" ); |
| 384 | |
| 385 | regmap_write(map: lt9611->regmap, reg: 0x8207, val: 0xbf); |
| 386 | regmap_write(map: lt9611->regmap, reg: 0x8207, val: 0x3f); |
| 387 | } |
| 388 | |
| 389 | /* hpd changed high */ |
| 390 | if (irq_flag3 & 0x40) { |
| 391 | dev_info(lt9611->dev, "hdmi cable connected\n" ); |
| 392 | |
| 393 | regmap_write(map: lt9611->regmap, reg: 0x8207, val: 0x7f); |
| 394 | regmap_write(map: lt9611->regmap, reg: 0x8207, val: 0x3f); |
| 395 | } |
| 396 | |
| 397 | if (irq_flag3 & 0xc0 && lt9611->bridge.dev) |
| 398 | drm_kms_helper_hotplug_event(dev: lt9611->bridge.dev); |
| 399 | |
| 400 | /* video input changed */ |
| 401 | if (irq_flag0 & 0x01) { |
| 402 | dev_info(lt9611->dev, "video input changed\n" ); |
| 403 | regmap_write(map: lt9611->regmap, reg: 0x829e, val: 0xff); |
| 404 | regmap_write(map: lt9611->regmap, reg: 0x829e, val: 0xf7); |
| 405 | regmap_write(map: lt9611->regmap, reg: 0x8204, val: 0xff); |
| 406 | regmap_write(map: lt9611->regmap, reg: 0x8204, val: 0xfe); |
| 407 | } |
| 408 | |
| 409 | return IRQ_HANDLED; |
| 410 | } |
| 411 | |
| 412 | static void lt9611_enable_hpd_interrupts(struct lt9611 *lt9611) |
| 413 | { |
| 414 | unsigned int val; |
| 415 | |
| 416 | regmap_read(map: lt9611->regmap, reg: 0x8203, val: &val); |
| 417 | |
| 418 | val &= ~0xc0; |
| 419 | regmap_write(map: lt9611->regmap, reg: 0x8203, val); |
| 420 | regmap_write(map: lt9611->regmap, reg: 0x8207, val: 0xff); /* clear */ |
| 421 | regmap_write(map: lt9611->regmap, reg: 0x8207, val: 0x3f); |
| 422 | } |
| 423 | |
| 424 | static void lt9611_sleep_setup(struct lt9611 *lt9611) |
| 425 | { |
| 426 | const struct reg_sequence sleep_setup[] = { |
| 427 | { 0x8024, 0x76 }, |
| 428 | { 0x8023, 0x01 }, |
| 429 | { 0x8157, 0x03 }, /* set addr pin as output */ |
| 430 | { 0x8149, 0x0b }, |
| 431 | |
| 432 | { 0x8102, 0x48 }, /* MIPI Rx power down */ |
| 433 | { 0x8123, 0x80 }, |
| 434 | { 0x8130, 0x00 }, |
| 435 | { 0x8011, 0x0a }, |
| 436 | }; |
| 437 | |
| 438 | regmap_multi_reg_write(map: lt9611->regmap, |
| 439 | regs: sleep_setup, ARRAY_SIZE(sleep_setup)); |
| 440 | lt9611->sleep = true; |
| 441 | } |
| 442 | |
| 443 | static int lt9611_power_on(struct lt9611 *lt9611) |
| 444 | { |
| 445 | int ret; |
| 446 | const struct reg_sequence seq[] = { |
| 447 | /* LT9611_System_Init */ |
| 448 | { 0x8101, 0x18 }, /* sel xtal clock */ |
| 449 | |
| 450 | /* timer for frequency meter */ |
| 451 | { 0x821b, 0x69 }, /* timer 2 */ |
| 452 | { 0x821c, 0x78 }, |
| 453 | { 0x82cb, 0x69 }, /* timer 1 */ |
| 454 | { 0x82cc, 0x78 }, |
| 455 | |
| 456 | /* irq init */ |
| 457 | { 0x8251, 0x01 }, |
| 458 | { 0x8258, 0x0a }, /* hpd irq */ |
| 459 | { 0x8259, 0x80 }, /* hpd debounce width */ |
| 460 | { 0x829e, 0xf7 }, /* video check irq */ |
| 461 | |
| 462 | /* power consumption for work */ |
| 463 | { 0x8004, 0xf0 }, |
| 464 | { 0x8006, 0xf0 }, |
| 465 | { 0x800a, 0x80 }, |
| 466 | { 0x800b, 0x40 }, |
| 467 | { 0x800d, 0xef }, |
| 468 | { 0x8011, 0xfa }, |
| 469 | }; |
| 470 | |
| 471 | if (lt9611->power_on) |
| 472 | return 0; |
| 473 | |
| 474 | ret = regmap_multi_reg_write(map: lt9611->regmap, regs: seq, ARRAY_SIZE(seq)); |
| 475 | if (!ret) |
| 476 | lt9611->power_on = true; |
| 477 | |
| 478 | return ret; |
| 479 | } |
| 480 | |
| 481 | static int lt9611_power_off(struct lt9611 *lt9611) |
| 482 | { |
| 483 | int ret; |
| 484 | |
| 485 | ret = regmap_write(map: lt9611->regmap, reg: 0x8130, val: 0x6a); |
| 486 | if (!ret) |
| 487 | lt9611->power_on = false; |
| 488 | |
| 489 | return ret; |
| 490 | } |
| 491 | |
| 492 | static void lt9611_reset(struct lt9611 *lt9611) |
| 493 | { |
| 494 | gpiod_set_value_cansleep(desc: lt9611->reset_gpio, value: 1); |
| 495 | msleep(msecs: 20); |
| 496 | |
| 497 | gpiod_set_value_cansleep(desc: lt9611->reset_gpio, value: 0); |
| 498 | msleep(msecs: 20); |
| 499 | |
| 500 | gpiod_set_value_cansleep(desc: lt9611->reset_gpio, value: 1); |
| 501 | msleep(msecs: 100); |
| 502 | } |
| 503 | |
| 504 | static void lt9611_assert_5v(struct lt9611 *lt9611) |
| 505 | { |
| 506 | if (!lt9611->enable_gpio) |
| 507 | return; |
| 508 | |
| 509 | gpiod_set_value_cansleep(desc: lt9611->enable_gpio, value: 1); |
| 510 | msleep(msecs: 20); |
| 511 | } |
| 512 | |
| 513 | static int lt9611_regulator_init(struct lt9611 *lt9611) |
| 514 | { |
| 515 | int ret; |
| 516 | |
| 517 | lt9611->supplies[0].supply = "vdd" ; |
| 518 | lt9611->supplies[1].supply = "vcc" ; |
| 519 | |
| 520 | ret = devm_regulator_bulk_get(dev: lt9611->dev, num_consumers: 2, consumers: lt9611->supplies); |
| 521 | if (ret < 0) |
| 522 | return ret; |
| 523 | |
| 524 | return regulator_set_load(regulator: lt9611->supplies[0].consumer, load_uA: 300000); |
| 525 | } |
| 526 | |
| 527 | static int lt9611_regulator_enable(struct lt9611 *lt9611) |
| 528 | { |
| 529 | int ret; |
| 530 | |
| 531 | ret = regulator_enable(regulator: lt9611->supplies[0].consumer); |
| 532 | if (ret < 0) |
| 533 | return ret; |
| 534 | |
| 535 | usleep_range(min: 1000, max: 10000); |
| 536 | |
| 537 | ret = regulator_enable(regulator: lt9611->supplies[1].consumer); |
| 538 | if (ret < 0) { |
| 539 | regulator_disable(regulator: lt9611->supplies[0].consumer); |
| 540 | return ret; |
| 541 | } |
| 542 | |
| 543 | return 0; |
| 544 | } |
| 545 | |
| 546 | static enum drm_connector_status |
| 547 | lt9611_bridge_detect(struct drm_bridge *bridge, struct drm_connector *connector) |
| 548 | { |
| 549 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 550 | unsigned int reg_val = 0; |
| 551 | int connected = 0; |
| 552 | |
| 553 | regmap_read(map: lt9611->regmap, reg: 0x825e, val: ®_val); |
| 554 | connected = (reg_val & (BIT(2) | BIT(0))); |
| 555 | |
| 556 | lt9611->status = connected ? connector_status_connected : |
| 557 | connector_status_disconnected; |
| 558 | |
| 559 | return lt9611->status; |
| 560 | } |
| 561 | |
| 562 | static int lt9611_read_edid(struct lt9611 *lt9611) |
| 563 | { |
| 564 | unsigned int temp; |
| 565 | int ret = 0; |
| 566 | int i, j; |
| 567 | |
| 568 | /* memset to clear old buffer, if any */ |
| 569 | memset(lt9611->edid_buf, 0, sizeof(lt9611->edid_buf)); |
| 570 | |
| 571 | regmap_write(map: lt9611->regmap, reg: 0x8503, val: 0xc9); |
| 572 | |
| 573 | /* 0xA0 is EDID device address */ |
| 574 | regmap_write(map: lt9611->regmap, reg: 0x8504, val: 0xa0); |
| 575 | /* 0x00 is EDID offset address */ |
| 576 | regmap_write(map: lt9611->regmap, reg: 0x8505, val: 0x00); |
| 577 | |
| 578 | /* length for read */ |
| 579 | regmap_write(map: lt9611->regmap, reg: 0x8506, EDID_LEN); |
| 580 | regmap_write(map: lt9611->regmap, reg: 0x8514, val: 0x7f); |
| 581 | |
| 582 | for (i = 0; i < EDID_LOOP; i++) { |
| 583 | /* offset address */ |
| 584 | regmap_write(map: lt9611->regmap, reg: 0x8505, val: i * EDID_LEN); |
| 585 | regmap_write(map: lt9611->regmap, reg: 0x8507, val: 0x36); |
| 586 | regmap_write(map: lt9611->regmap, reg: 0x8507, val: 0x31); |
| 587 | regmap_write(map: lt9611->regmap, reg: 0x8507, val: 0x37); |
| 588 | usleep_range(min: 5000, max: 10000); |
| 589 | |
| 590 | regmap_read(map: lt9611->regmap, reg: 0x8540, val: &temp); |
| 591 | |
| 592 | if (temp & KEY_DDC_ACCS_DONE) { |
| 593 | for (j = 0; j < EDID_LEN; j++) { |
| 594 | regmap_read(map: lt9611->regmap, reg: 0x8583, val: &temp); |
| 595 | lt9611->edid_buf[i * EDID_LEN + j] = temp; |
| 596 | } |
| 597 | |
| 598 | } else if (temp & DDC_NO_ACK) { /* DDC No Ack or Abitration lost */ |
| 599 | dev_err(lt9611->dev, "read edid failed: no ack\n" ); |
| 600 | ret = -EIO; |
| 601 | goto end; |
| 602 | |
| 603 | } else { |
| 604 | dev_err(lt9611->dev, "read edid failed: access not done\n" ); |
| 605 | ret = -EIO; |
| 606 | goto end; |
| 607 | } |
| 608 | } |
| 609 | |
| 610 | end: |
| 611 | regmap_write(map: lt9611->regmap, reg: 0x8507, val: 0x1f); |
| 612 | return ret; |
| 613 | } |
| 614 | |
| 615 | static int |
| 616 | lt9611_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len) |
| 617 | { |
| 618 | struct lt9611 *lt9611 = data; |
| 619 | int ret; |
| 620 | |
| 621 | if (len > 128) |
| 622 | return -EINVAL; |
| 623 | |
| 624 | /* supports up to 1 extension block */ |
| 625 | /* TODO: add support for more extension blocks */ |
| 626 | if (block > 1) |
| 627 | return -EINVAL; |
| 628 | |
| 629 | if (block == 0) { |
| 630 | ret = lt9611_read_edid(lt9611); |
| 631 | if (ret) { |
| 632 | dev_err(lt9611->dev, "edid read failed\n" ); |
| 633 | return ret; |
| 634 | } |
| 635 | } |
| 636 | |
| 637 | block %= 2; |
| 638 | memcpy(buf, lt9611->edid_buf + (block * 128), len); |
| 639 | |
| 640 | return 0; |
| 641 | } |
| 642 | |
| 643 | /* bridge funcs */ |
| 644 | static void lt9611_bridge_atomic_enable(struct drm_bridge *bridge, |
| 645 | struct drm_atomic_state *state) |
| 646 | { |
| 647 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 648 | struct drm_connector *connector; |
| 649 | struct drm_connector_state *conn_state; |
| 650 | struct drm_crtc_state *crtc_state; |
| 651 | struct drm_display_mode *mode; |
| 652 | unsigned int postdiv; |
| 653 | |
| 654 | connector = drm_atomic_get_new_connector_for_encoder(state, encoder: bridge->encoder); |
| 655 | if (WARN_ON(!connector)) |
| 656 | return; |
| 657 | |
| 658 | conn_state = drm_atomic_get_new_connector_state(state, connector); |
| 659 | if (WARN_ON(!conn_state)) |
| 660 | return; |
| 661 | |
| 662 | crtc_state = drm_atomic_get_new_crtc_state(state, crtc: conn_state->crtc); |
| 663 | if (WARN_ON(!crtc_state)) |
| 664 | return; |
| 665 | |
| 666 | mode = &crtc_state->adjusted_mode; |
| 667 | |
| 668 | lt9611_mipi_input_digital(lt9611, mode); |
| 669 | lt9611_pll_setup(lt9611, mode, postdiv: &postdiv); |
| 670 | lt9611_mipi_video_setup(lt9611, mode); |
| 671 | lt9611_pcr_setup(lt9611, mode, postdiv); |
| 672 | |
| 673 | if (lt9611_power_on(lt9611)) { |
| 674 | dev_err(lt9611->dev, "power on failed\n" ); |
| 675 | return; |
| 676 | } |
| 677 | |
| 678 | lt9611_mipi_input_analog(lt9611); |
| 679 | drm_atomic_helper_connector_hdmi_update_infoframes(connector, state); |
| 680 | lt9611_hdmi_tx_digital(lt9611, is_hdmi: connector->display_info.is_hdmi); |
| 681 | lt9611_hdmi_tx_phy(lt9611); |
| 682 | |
| 683 | msleep(msecs: 500); |
| 684 | |
| 685 | lt9611_video_check(lt9611); |
| 686 | |
| 687 | /* Enable HDMI output */ |
| 688 | regmap_write(map: lt9611->regmap, reg: 0x8130, val: 0xea); |
| 689 | } |
| 690 | |
| 691 | static void lt9611_bridge_atomic_disable(struct drm_bridge *bridge, |
| 692 | struct drm_atomic_state *state) |
| 693 | { |
| 694 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 695 | int ret; |
| 696 | |
| 697 | /* Disable HDMI output */ |
| 698 | ret = regmap_write(map: lt9611->regmap, reg: 0x8130, val: 0x6a); |
| 699 | if (ret) { |
| 700 | dev_err(lt9611->dev, "video on failed\n" ); |
| 701 | return; |
| 702 | } |
| 703 | |
| 704 | if (lt9611_power_off(lt9611)) { |
| 705 | dev_err(lt9611->dev, "power on failed\n" ); |
| 706 | return; |
| 707 | } |
| 708 | } |
| 709 | |
| 710 | static struct mipi_dsi_device *lt9611_attach_dsi(struct lt9611 *lt9611, |
| 711 | struct device_node *dsi_node) |
| 712 | { |
| 713 | const struct mipi_dsi_device_info info = { "lt9611" , 0, lt9611->dev->of_node}; |
| 714 | struct mipi_dsi_device *dsi; |
| 715 | struct mipi_dsi_host *host; |
| 716 | struct device *dev = lt9611->dev; |
| 717 | int ret; |
| 718 | |
| 719 | host = of_find_mipi_dsi_host_by_node(node: dsi_node); |
| 720 | if (!host) |
| 721 | return ERR_PTR(error: dev_err_probe(dev: lt9611->dev, err: -EPROBE_DEFER, fmt: "failed to find dsi host\n" )); |
| 722 | |
| 723 | dsi = devm_mipi_dsi_device_register_full(dev, host, info: &info); |
| 724 | if (IS_ERR(ptr: dsi)) { |
| 725 | dev_err(lt9611->dev, "failed to create dsi device\n" ); |
| 726 | return dsi; |
| 727 | } |
| 728 | |
| 729 | dsi->lanes = 4; |
| 730 | dsi->format = MIPI_DSI_FMT_RGB888; |
| 731 | dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | |
| 732 | MIPI_DSI_MODE_VIDEO_HSE; |
| 733 | |
| 734 | ret = devm_mipi_dsi_attach(dev, dsi); |
| 735 | if (ret < 0) { |
| 736 | dev_err(dev, "failed to attach dsi to host\n" ); |
| 737 | return ERR_PTR(error: ret); |
| 738 | } |
| 739 | |
| 740 | return dsi; |
| 741 | } |
| 742 | |
| 743 | static int lt9611_bridge_attach(struct drm_bridge *bridge, |
| 744 | struct drm_encoder *encoder, |
| 745 | enum drm_bridge_attach_flags flags) |
| 746 | { |
| 747 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 748 | |
| 749 | return drm_bridge_attach(encoder, bridge: lt9611->next_bridge, |
| 750 | previous: bridge, flags); |
| 751 | } |
| 752 | |
| 753 | static enum drm_mode_status lt9611_bridge_mode_valid(struct drm_bridge *bridge, |
| 754 | const struct drm_display_info *info, |
| 755 | const struct drm_display_mode *mode) |
| 756 | { |
| 757 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 758 | |
| 759 | if (mode->hdisplay > 3840) |
| 760 | return MODE_BAD_HVALUE; |
| 761 | |
| 762 | if (mode->hdisplay > 2000 && !lt9611->dsi1_node) |
| 763 | return MODE_PANEL; |
| 764 | |
| 765 | return MODE_OK; |
| 766 | } |
| 767 | |
| 768 | static void lt9611_bridge_atomic_pre_enable(struct drm_bridge *bridge, |
| 769 | struct drm_atomic_state *state) |
| 770 | { |
| 771 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 772 | static const struct reg_sequence reg_cfg[] = { |
| 773 | { 0x8102, 0x12 }, |
| 774 | { 0x8123, 0x40 }, |
| 775 | { 0x8130, 0xea }, |
| 776 | { 0x8011, 0xfa }, |
| 777 | }; |
| 778 | |
| 779 | if (!lt9611->sleep) |
| 780 | return; |
| 781 | |
| 782 | regmap_multi_reg_write(map: lt9611->regmap, |
| 783 | regs: reg_cfg, ARRAY_SIZE(reg_cfg)); |
| 784 | |
| 785 | lt9611->sleep = false; |
| 786 | } |
| 787 | |
| 788 | static void lt9611_bridge_atomic_post_disable(struct drm_bridge *bridge, |
| 789 | struct drm_atomic_state *state) |
| 790 | { |
| 791 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 792 | |
| 793 | lt9611_sleep_setup(lt9611); |
| 794 | } |
| 795 | |
| 796 | static const struct drm_edid *lt9611_bridge_edid_read(struct drm_bridge *bridge, |
| 797 | struct drm_connector *connector) |
| 798 | { |
| 799 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 800 | |
| 801 | lt9611_power_on(lt9611); |
| 802 | return drm_edid_read_custom(connector, read_block: lt9611_get_edid_block, context: lt9611); |
| 803 | } |
| 804 | |
| 805 | static void lt9611_bridge_hpd_enable(struct drm_bridge *bridge) |
| 806 | { |
| 807 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 808 | |
| 809 | lt9611_enable_hpd_interrupts(lt9611); |
| 810 | } |
| 811 | |
| 812 | #define MAX_INPUT_SEL_FORMATS 1 |
| 813 | |
| 814 | static u32 * |
| 815 | lt9611_atomic_get_input_bus_fmts(struct drm_bridge *bridge, |
| 816 | struct drm_bridge_state *bridge_state, |
| 817 | struct drm_crtc_state *crtc_state, |
| 818 | struct drm_connector_state *conn_state, |
| 819 | u32 output_fmt, |
| 820 | unsigned int *num_input_fmts) |
| 821 | { |
| 822 | u32 *input_fmts; |
| 823 | |
| 824 | *num_input_fmts = 0; |
| 825 | |
| 826 | input_fmts = kcalloc(MAX_INPUT_SEL_FORMATS, sizeof(*input_fmts), |
| 827 | GFP_KERNEL); |
| 828 | if (!input_fmts) |
| 829 | return NULL; |
| 830 | |
| 831 | /* This is the DSI-end bus format */ |
| 832 | input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24; |
| 833 | *num_input_fmts = 1; |
| 834 | |
| 835 | return input_fmts; |
| 836 | } |
| 837 | |
| 838 | /* |
| 839 | * Other working frames: |
| 840 | * - 0x01, 0x84df |
| 841 | * - 0x04, 0x84c0 |
| 842 | */ |
| 843 | #define LT9611_INFOFRAME_AUDIO 0x02 |
| 844 | #define LT9611_INFOFRAME_AVI 0x08 |
| 845 | #define LT9611_INFOFRAME_SPD 0x10 |
| 846 | #define LT9611_INFOFRAME_VENDOR 0x20 |
| 847 | |
| 848 | static int lt9611_hdmi_clear_infoframe(struct drm_bridge *bridge, |
| 849 | enum hdmi_infoframe_type type) |
| 850 | { |
| 851 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 852 | unsigned int mask; |
| 853 | |
| 854 | switch (type) { |
| 855 | case HDMI_INFOFRAME_TYPE_AUDIO: |
| 856 | mask = LT9611_INFOFRAME_AUDIO; |
| 857 | break; |
| 858 | |
| 859 | case HDMI_INFOFRAME_TYPE_AVI: |
| 860 | mask = LT9611_INFOFRAME_AVI; |
| 861 | break; |
| 862 | |
| 863 | case HDMI_INFOFRAME_TYPE_SPD: |
| 864 | mask = LT9611_INFOFRAME_SPD; |
| 865 | break; |
| 866 | |
| 867 | case HDMI_INFOFRAME_TYPE_VENDOR: |
| 868 | mask = LT9611_INFOFRAME_VENDOR; |
| 869 | break; |
| 870 | |
| 871 | default: |
| 872 | drm_dbg_driver(lt9611->bridge.dev, "Unsupported HDMI InfoFrame %x\n" , type); |
| 873 | mask = 0; |
| 874 | break; |
| 875 | } |
| 876 | |
| 877 | if (mask) |
| 878 | regmap_update_bits(map: lt9611->regmap, reg: 0x843d, mask, val: 0); |
| 879 | |
| 880 | return 0; |
| 881 | } |
| 882 | |
| 883 | static int lt9611_hdmi_write_infoframe(struct drm_bridge *bridge, |
| 884 | enum hdmi_infoframe_type type, |
| 885 | const u8 *buffer, size_t len) |
| 886 | { |
| 887 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 888 | unsigned int mask, addr; |
| 889 | int i; |
| 890 | |
| 891 | switch (type) { |
| 892 | case HDMI_INFOFRAME_TYPE_AUDIO: |
| 893 | mask = LT9611_INFOFRAME_AUDIO; |
| 894 | addr = 0x84b2; |
| 895 | break; |
| 896 | |
| 897 | case HDMI_INFOFRAME_TYPE_AVI: |
| 898 | mask = LT9611_INFOFRAME_AVI; |
| 899 | addr = 0x8440; |
| 900 | break; |
| 901 | |
| 902 | case HDMI_INFOFRAME_TYPE_SPD: |
| 903 | mask = LT9611_INFOFRAME_SPD; |
| 904 | addr = 0x8493; |
| 905 | break; |
| 906 | |
| 907 | case HDMI_INFOFRAME_TYPE_VENDOR: |
| 908 | mask = LT9611_INFOFRAME_VENDOR; |
| 909 | addr = 0x8474; |
| 910 | break; |
| 911 | |
| 912 | default: |
| 913 | drm_dbg_driver(lt9611->bridge.dev, "Unsupported HDMI InfoFrame %x\n" , type); |
| 914 | mask = 0; |
| 915 | break; |
| 916 | } |
| 917 | |
| 918 | if (mask) { |
| 919 | for (i = 0; i < len; i++) |
| 920 | regmap_write(map: lt9611->regmap, reg: addr + i, val: buffer[i]); |
| 921 | |
| 922 | regmap_update_bits(map: lt9611->regmap, reg: 0x843d, mask, val: mask); |
| 923 | } |
| 924 | |
| 925 | return 0; |
| 926 | } |
| 927 | |
| 928 | static enum drm_mode_status |
| 929 | lt9611_hdmi_tmds_char_rate_valid(const struct drm_bridge *bridge, |
| 930 | const struct drm_display_mode *mode, |
| 931 | unsigned long long tmds_rate) |
| 932 | { |
| 933 | /* 297 MHz for 4k@30 mode */ |
| 934 | if (tmds_rate > 297000000) |
| 935 | return MODE_CLOCK_HIGH; |
| 936 | |
| 937 | return MODE_OK; |
| 938 | } |
| 939 | |
| 940 | static int lt9611_hdmi_audio_startup(struct drm_bridge *bridge, |
| 941 | struct drm_connector *connector) |
| 942 | { |
| 943 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 944 | |
| 945 | regmap_write(map: lt9611->regmap, reg: 0x82d6, val: 0x8c); |
| 946 | regmap_write(map: lt9611->regmap, reg: 0x82d7, val: 0x04); |
| 947 | |
| 948 | regmap_write(map: lt9611->regmap, reg: 0x8406, val: 0x08); |
| 949 | regmap_write(map: lt9611->regmap, reg: 0x8407, val: 0x10); |
| 950 | |
| 951 | regmap_write(map: lt9611->regmap, reg: 0x8434, val: 0xd5); |
| 952 | |
| 953 | return 0; |
| 954 | } |
| 955 | |
| 956 | static int lt9611_hdmi_audio_prepare(struct drm_bridge *bridge, |
| 957 | struct drm_connector *connector, |
| 958 | struct hdmi_codec_daifmt *fmt, |
| 959 | struct hdmi_codec_params *hparms) |
| 960 | { |
| 961 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 962 | |
| 963 | if (hparms->sample_rate == 48000) |
| 964 | regmap_write(map: lt9611->regmap, reg: 0x840f, val: 0x2b); |
| 965 | else if (hparms->sample_rate == 96000) |
| 966 | regmap_write(map: lt9611->regmap, reg: 0x840f, val: 0xab); |
| 967 | else |
| 968 | return -EINVAL; |
| 969 | |
| 970 | regmap_write(map: lt9611->regmap, reg: 0x8435, val: 0x00); |
| 971 | regmap_write(map: lt9611->regmap, reg: 0x8436, val: 0x18); |
| 972 | regmap_write(map: lt9611->regmap, reg: 0x8437, val: 0x00); |
| 973 | |
| 974 | return drm_atomic_helper_connector_hdmi_update_audio_infoframe(connector, |
| 975 | frame: &hparms->cea); |
| 976 | } |
| 977 | |
| 978 | static void lt9611_hdmi_audio_shutdown(struct drm_bridge *bridge, |
| 979 | struct drm_connector *connector) |
| 980 | { |
| 981 | struct lt9611 *lt9611 = bridge_to_lt9611(bridge); |
| 982 | |
| 983 | drm_atomic_helper_connector_hdmi_clear_audio_infoframe(connector); |
| 984 | |
| 985 | regmap_write(map: lt9611->regmap, reg: 0x8406, val: 0x00); |
| 986 | regmap_write(map: lt9611->regmap, reg: 0x8407, val: 0x00); |
| 987 | } |
| 988 | |
| 989 | static const struct drm_bridge_funcs lt9611_bridge_funcs = { |
| 990 | .attach = lt9611_bridge_attach, |
| 991 | .mode_valid = lt9611_bridge_mode_valid, |
| 992 | .detect = lt9611_bridge_detect, |
| 993 | .edid_read = lt9611_bridge_edid_read, |
| 994 | .hpd_enable = lt9611_bridge_hpd_enable, |
| 995 | |
| 996 | .atomic_pre_enable = lt9611_bridge_atomic_pre_enable, |
| 997 | .atomic_enable = lt9611_bridge_atomic_enable, |
| 998 | .atomic_disable = lt9611_bridge_atomic_disable, |
| 999 | .atomic_post_disable = lt9611_bridge_atomic_post_disable, |
| 1000 | .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, |
| 1001 | .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, |
| 1002 | .atomic_reset = drm_atomic_helper_bridge_reset, |
| 1003 | .atomic_get_input_bus_fmts = lt9611_atomic_get_input_bus_fmts, |
| 1004 | |
| 1005 | .hdmi_tmds_char_rate_valid = lt9611_hdmi_tmds_char_rate_valid, |
| 1006 | .hdmi_write_infoframe = lt9611_hdmi_write_infoframe, |
| 1007 | .hdmi_clear_infoframe = lt9611_hdmi_clear_infoframe, |
| 1008 | |
| 1009 | .hdmi_audio_startup = lt9611_hdmi_audio_startup, |
| 1010 | .hdmi_audio_prepare = lt9611_hdmi_audio_prepare, |
| 1011 | .hdmi_audio_shutdown = lt9611_hdmi_audio_shutdown, |
| 1012 | }; |
| 1013 | |
| 1014 | static int lt9611_parse_dt(struct device *dev, |
| 1015 | struct lt9611 *lt9611) |
| 1016 | { |
| 1017 | lt9611->dsi0_node = of_graph_get_remote_node(node: dev->of_node, port: 0, endpoint: -1); |
| 1018 | if (!lt9611->dsi0_node) { |
| 1019 | dev_err(lt9611->dev, "failed to get remote node for primary dsi\n" ); |
| 1020 | return -ENODEV; |
| 1021 | } |
| 1022 | |
| 1023 | lt9611->dsi1_node = of_graph_get_remote_node(node: dev->of_node, port: 1, endpoint: -1); |
| 1024 | |
| 1025 | lt9611->ac_mode = of_property_read_bool(np: dev->of_node, propname: "lt,ac-mode" ); |
| 1026 | |
| 1027 | return drm_of_find_panel_or_bridge(np: dev->of_node, port: 2, endpoint: -1, NULL, bridge: <9611->next_bridge); |
| 1028 | } |
| 1029 | |
| 1030 | static int lt9611_gpio_init(struct lt9611 *lt9611) |
| 1031 | { |
| 1032 | struct device *dev = lt9611->dev; |
| 1033 | |
| 1034 | lt9611->reset_gpio = devm_gpiod_get(dev, con_id: "reset" , flags: GPIOD_OUT_HIGH); |
| 1035 | if (IS_ERR(ptr: lt9611->reset_gpio)) { |
| 1036 | dev_err(dev, "failed to acquire reset gpio\n" ); |
| 1037 | return PTR_ERR(ptr: lt9611->reset_gpio); |
| 1038 | } |
| 1039 | |
| 1040 | lt9611->enable_gpio = devm_gpiod_get_optional(dev, con_id: "enable" , |
| 1041 | flags: GPIOD_OUT_LOW); |
| 1042 | if (IS_ERR(ptr: lt9611->enable_gpio)) { |
| 1043 | dev_err(dev, "failed to acquire enable gpio\n" ); |
| 1044 | return PTR_ERR(ptr: lt9611->enable_gpio); |
| 1045 | } |
| 1046 | |
| 1047 | return 0; |
| 1048 | } |
| 1049 | |
| 1050 | static int lt9611_read_device_rev(struct lt9611 *lt9611) |
| 1051 | { |
| 1052 | unsigned int rev; |
| 1053 | int ret; |
| 1054 | |
| 1055 | regmap_write(map: lt9611->regmap, reg: 0x80ee, val: 0x01); |
| 1056 | ret = regmap_read(map: lt9611->regmap, reg: 0x8002, val: &rev); |
| 1057 | if (ret) |
| 1058 | dev_err(lt9611->dev, "failed to read revision: %d\n" , ret); |
| 1059 | else |
| 1060 | dev_info(lt9611->dev, "LT9611 revision: 0x%x\n" , rev); |
| 1061 | |
| 1062 | return ret; |
| 1063 | } |
| 1064 | |
| 1065 | static int lt9611_probe(struct i2c_client *client) |
| 1066 | { |
| 1067 | struct lt9611 *lt9611; |
| 1068 | struct device *dev = &client->dev; |
| 1069 | int ret; |
| 1070 | |
| 1071 | if (!i2c_check_functionality(adap: client->adapter, I2C_FUNC_I2C)) { |
| 1072 | dev_err(dev, "device doesn't support I2C\n" ); |
| 1073 | return -ENODEV; |
| 1074 | } |
| 1075 | |
| 1076 | lt9611 = devm_drm_bridge_alloc(dev, struct lt9611, bridge, |
| 1077 | <9611_bridge_funcs); |
| 1078 | if (IS_ERR(ptr: lt9611)) |
| 1079 | return PTR_ERR(ptr: lt9611); |
| 1080 | |
| 1081 | lt9611->dev = dev; |
| 1082 | lt9611->client = client; |
| 1083 | lt9611->sleep = false; |
| 1084 | |
| 1085 | lt9611->regmap = devm_regmap_init_i2c(client, <9611_regmap_config); |
| 1086 | if (IS_ERR(ptr: lt9611->regmap)) { |
| 1087 | dev_err(lt9611->dev, "regmap i2c init failed\n" ); |
| 1088 | return PTR_ERR(ptr: lt9611->regmap); |
| 1089 | } |
| 1090 | |
| 1091 | ret = lt9611_parse_dt(dev, lt9611); |
| 1092 | if (ret) { |
| 1093 | dev_err(dev, "failed to parse device tree\n" ); |
| 1094 | return ret; |
| 1095 | } |
| 1096 | |
| 1097 | ret = lt9611_gpio_init(lt9611); |
| 1098 | if (ret < 0) |
| 1099 | goto err_of_put; |
| 1100 | |
| 1101 | ret = lt9611_regulator_init(lt9611); |
| 1102 | if (ret < 0) |
| 1103 | goto err_of_put; |
| 1104 | |
| 1105 | lt9611_assert_5v(lt9611); |
| 1106 | |
| 1107 | ret = lt9611_regulator_enable(lt9611); |
| 1108 | if (ret) |
| 1109 | goto err_of_put; |
| 1110 | |
| 1111 | lt9611_reset(lt9611); |
| 1112 | |
| 1113 | ret = lt9611_read_device_rev(lt9611); |
| 1114 | if (ret) { |
| 1115 | dev_err(dev, "failed to read chip rev\n" ); |
| 1116 | goto err_disable_regulators; |
| 1117 | } |
| 1118 | |
| 1119 | ret = devm_request_threaded_irq(dev, irq: client->irq, NULL, |
| 1120 | thread_fn: lt9611_irq_thread_handler, |
| 1121 | IRQF_ONESHOT, devname: "lt9611" , dev_id: lt9611); |
| 1122 | if (ret) { |
| 1123 | dev_err(dev, "failed to request irq\n" ); |
| 1124 | goto err_disable_regulators; |
| 1125 | } |
| 1126 | |
| 1127 | i2c_set_clientdata(client, data: lt9611); |
| 1128 | |
| 1129 | /* Disable Audio InfoFrame, enabled by default */ |
| 1130 | regmap_update_bits(map: lt9611->regmap, reg: 0x843d, LT9611_INFOFRAME_AUDIO, val: 0); |
| 1131 | |
| 1132 | lt9611->bridge.of_node = client->dev.of_node; |
| 1133 | lt9611->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID | |
| 1134 | DRM_BRIDGE_OP_HPD | DRM_BRIDGE_OP_MODES | |
| 1135 | DRM_BRIDGE_OP_HDMI | DRM_BRIDGE_OP_HDMI_AUDIO; |
| 1136 | lt9611->bridge.type = DRM_MODE_CONNECTOR_HDMIA; |
| 1137 | lt9611->bridge.vendor = "Lontium" ; |
| 1138 | lt9611->bridge.product = "LT9611" ; |
| 1139 | lt9611->bridge.hdmi_audio_dev = dev; |
| 1140 | lt9611->bridge.hdmi_audio_max_i2s_playback_channels = 8; |
| 1141 | lt9611->bridge.hdmi_audio_dai_port = 2; |
| 1142 | |
| 1143 | drm_bridge_add(bridge: <9611->bridge); |
| 1144 | |
| 1145 | /* Attach primary DSI */ |
| 1146 | lt9611->dsi0 = lt9611_attach_dsi(lt9611, dsi_node: lt9611->dsi0_node); |
| 1147 | if (IS_ERR(ptr: lt9611->dsi0)) { |
| 1148 | ret = PTR_ERR(ptr: lt9611->dsi0); |
| 1149 | goto err_remove_bridge; |
| 1150 | } |
| 1151 | |
| 1152 | /* Attach secondary DSI, if specified */ |
| 1153 | if (lt9611->dsi1_node) { |
| 1154 | lt9611->dsi1 = lt9611_attach_dsi(lt9611, dsi_node: lt9611->dsi1_node); |
| 1155 | if (IS_ERR(ptr: lt9611->dsi1)) { |
| 1156 | ret = PTR_ERR(ptr: lt9611->dsi1); |
| 1157 | goto err_remove_bridge; |
| 1158 | } |
| 1159 | } |
| 1160 | |
| 1161 | lt9611_enable_hpd_interrupts(lt9611); |
| 1162 | |
| 1163 | return 0; |
| 1164 | |
| 1165 | err_remove_bridge: |
| 1166 | drm_bridge_remove(bridge: <9611->bridge); |
| 1167 | |
| 1168 | err_disable_regulators: |
| 1169 | regulator_bulk_disable(ARRAY_SIZE(lt9611->supplies), consumers: lt9611->supplies); |
| 1170 | |
| 1171 | err_of_put: |
| 1172 | of_node_put(node: lt9611->dsi1_node); |
| 1173 | of_node_put(node: lt9611->dsi0_node); |
| 1174 | |
| 1175 | return ret; |
| 1176 | } |
| 1177 | |
| 1178 | static void lt9611_remove(struct i2c_client *client) |
| 1179 | { |
| 1180 | struct lt9611 *lt9611 = i2c_get_clientdata(client); |
| 1181 | |
| 1182 | disable_irq(irq: client->irq); |
| 1183 | drm_bridge_remove(bridge: <9611->bridge); |
| 1184 | |
| 1185 | regulator_bulk_disable(ARRAY_SIZE(lt9611->supplies), consumers: lt9611->supplies); |
| 1186 | |
| 1187 | of_node_put(node: lt9611->dsi1_node); |
| 1188 | of_node_put(node: lt9611->dsi0_node); |
| 1189 | } |
| 1190 | |
| 1191 | static const struct i2c_device_id lt9611_id[] = { |
| 1192 | { "lontium,lt9611" }, |
| 1193 | {} |
| 1194 | }; |
| 1195 | MODULE_DEVICE_TABLE(i2c, lt9611_id); |
| 1196 | |
| 1197 | static const struct of_device_id lt9611_match_table[] = { |
| 1198 | { .compatible = "lontium,lt9611" }, |
| 1199 | { } |
| 1200 | }; |
| 1201 | MODULE_DEVICE_TABLE(of, lt9611_match_table); |
| 1202 | |
| 1203 | static struct i2c_driver lt9611_driver = { |
| 1204 | .driver = { |
| 1205 | .name = "lt9611" , |
| 1206 | .of_match_table = lt9611_match_table, |
| 1207 | }, |
| 1208 | .probe = lt9611_probe, |
| 1209 | .remove = lt9611_remove, |
| 1210 | .id_table = lt9611_id, |
| 1211 | }; |
| 1212 | module_i2c_driver(lt9611_driver); |
| 1213 | |
| 1214 | MODULE_DESCRIPTION("Lontium LT9611 DSI/HDMI bridge driver" ); |
| 1215 | MODULE_LICENSE("GPL v2" ); |
| 1216 | |