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ci: ci.yml introduce riscv64 linux and musllinux to wheels build#1666

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May 15, 2026
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ci: ci.yml introduce riscv64 linux and musllinux to wheels build#1666
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eshattow:workflow-ci-riscv64

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@eshattow
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Let's add the build and publish of RISC-V architecture to the workflows using qemu split target strategy similar to how this is currently done for armv7l

Relative build duration comparison:

0h 49m 01s qemu split strategy on RISE RISC-V Runners ubuntu-24.04-riscv
1h 51m 48s default strategy RISE RISC-V Runners ubuntu-24.04-riscv
0h 55m 28s qemu split strategy on GitHub Actions runners ubuntu-latest

I'm sending this PR with changes aligned with the latter strategy (qemu split on GitHub Actions runners) as it fits closest to the existing build system and does not involve any decision making on whether to integrate the RISE RISC-V Runners add-on from GitHub marketplace to the repo; and the build time is comparable or favorable, even.

Resolves: #1665

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codspeed-hq Bot commented Apr 29, 2026

Merging this PR will not alter performance

✅ 6 untouched benchmarks


Comparing eshattow:workflow-ci-riscv64 (b3feba3) with master (bc8ec8d)

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codecov Bot commented Apr 29, 2026

Codecov Report

✅ All modified and coverable lines are covered by tests.
✅ Project coverage is 99.76%. Comparing base (bc8ec8d) to head (b3feba3).

Additional details and impacted files
@@           Coverage Diff           @@
##           master    #1666   +/-   ##
=======================================
  Coverage   99.76%   99.76%           
=======================================
  Files          33       33           
  Lines        3401     3401           
  Branches      461      461           
=======================================
  Hits         3393     3393           
  Misses          5        5           
  Partials        3        3           

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@eshattow eshattow force-pushed the workflow-ci-riscv64 branch from 5befd46 to 595dbec Compare April 29, 2026 23:25
Comment thread .github/workflows/ci.yml Outdated
Comment thread .github/workflows/ci.yml Outdated
@bdraco bdraco changed the title workflows: ci.yml introduce riscv64 linux and musllinux to wheels build ci: ci.yml introduce riscv64 linux and musllinux to wheels build Apr 30, 2026
@eshattow eshattow force-pushed the workflow-ci-riscv64 branch 2 times, most recently from fb8be59 to f22f1ee Compare May 1, 2026 21:10
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eshattow commented May 1, 2026

force pushed with requested changes rolled into single commit, resolves linter reported errors in commit subject formatting

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eshattow commented May 2, 2026

I don't know what to suggest to fix the more general workflow problems on this repository for external contributions, tracking issue for that is #1668

Adding RISC-V architecture to build and publish workflow via QEMU

Dropped pyver 3.9 from riscv64 as suggested in code review

Co-authored-by: J. Nick Koston <nick+github@koston.org>
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bdraco commented May 15, 2026

@bluetoothbot review

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bluetoothbot commented May 15, 2026

PR Review — ci: ci.yml introduce riscv64 linux and musllinux to wheels build

Mechanically the change is correct and mirrors the established armv7l QEMU-split pattern, just with riscv64 as the target arch. The cp39 entries from the earlier revision are gone, addressing @bdraco's review comments. Two non-blocking notes: (1) the new entries use YAML flow style while the surrounding armv7l entries use block style — worth normalising for grep/diff ergonomics; (2) cp314t on emulated riscv64 is the riskiest cell and worth watching on the first green run before relying on it. No correctness, security, or build-correctness concerns with the matrix itself (cibuildwheel 3.4.1 supports riscv64 manylinux + musllinux, and the existing tonistiigi/binfmt:qemu-v8.1.5 image registers riscv64).


🟢 Suggestions

1. Match the existing block-style YAML for matrix entries (`.github/workflows/ci.yml`, L261-272)

The existing armv7l entries above (lines 197-260) use multi-line block style:

- os: ubuntu-latest
  qemu: armv7l
  musl: "musllinux"
  pyver: cp310

The new riscv64 entries use YAML flow style ({os: ubuntu-latest, qemu: riscv64, ...}). Mixing the two styles in the same include: list makes future diffs and edits noisier (e.g. adding a new key would have to be done twice in two different shapes). Consider expanding the riscv64 entries to the same block form so the matrix stays uniform.

- {os: ubuntu-latest, qemu: riscv64, musl: "musllinux", pyver: cp310}
2. cp314t under emulated riscv64 will be slow and potentially flaky (`.github/workflows/ci.yml`, L266-272)

Free-threaded CPython under QEMU user-mode emulation is the slowest combination in this matrix (no GIL fast paths, all-emulated). The PR description cites ~55 min wall time for the full split — the cp314t-riscv64 cell is likely to be the long-tail straggler and the one most prone to timeouts as cibuildwheel pulls in the free-threaded toolchain in an emulated rootfs. It's worth verifying the cp314t-riscv64-musllinux and cp314t-riscv64-manylinux cells actually green on the first run before declaring this matrix stable; if they routinely timeout, consider dropping just those two entries (cp310–cp314 still gives RISC-V coverage) rather than letting them block the wheel job.

- {os: ubuntu-latest, qemu: riscv64, musl: "musllinux", pyver: cp314t}
- {os: ubuntu-latest, qemu: riscv64, musl: "", pyver: cp314t}

Checklist

  • No hardcoded secrets or credentials
  • Matches existing matrix entry style — suggestion #1
  • cp39 entries removed per prior review
  • QEMU image / cibuildwheel versions support riscv64
  • Free-threaded (cp314t) coverage considered — suggestion #2

Summary

Mechanically the change is correct and mirrors the established armv7l QEMU-split pattern, just with riscv64 as the target arch. The cp39 entries from the earlier revision are gone, addressing @bdraco's review comments. Two non-blocking notes: (1) the new entries use YAML flow style while the surrounding armv7l entries use block style — worth normalising for grep/diff ergonomics; (2) cp314t on emulated riscv64 is the riskiest cell and worth watching on the first green run before relying on it. No correctness, security, or build-correctness concerns with the matrix itself (cibuildwheel 3.4.1 supports riscv64 manylinux + musllinux, and the existing tonistiigi/binfmt:qemu-v8.1.5 image registers riscv64).


Automated review by Kōan8e703fa
b3feba3

@bdraco bdraco merged commit 8a7dff9 into python-zeroconf:master May 15, 2026
42 checks passed
@eshattow eshattow deleted the workflow-ci-riscv64 branch May 16, 2026 04:00
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Build and publish RISC-V architecture

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