riscv: fix RV32 issues found during validation#30733
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cmuellner wants to merge 3 commits intoopenssl:masterfrom
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riscv: fix RV32 issues found during validation#30733cmuellner wants to merge 3 commits intoopenssl:masterfrom
cmuellner wants to merge 3 commits intoopenssl:masterfrom
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Use %zu when formatting riscv_vlen() in the CPU info string. On RV32, riscv_vlen() returns size_t backed by unsigned int, so %lu triggers -Werror=format during the build. This keeps the RV32 build aligned with the existing size_t interface. Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Cast the XTS stream selection operands to OSSL_xts_stream_fn before assigning them to the provider context. On RV32, the Zknd/Zkne XTS paths pass NULL stream callbacks. Without the cast, the conditional expression is treated as void * and fails under -Werror=pedantic. Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
This adds an example that shows how to set OPENSSL_riscvcap for an "rv32gc" ISA string. This documents that the mechanism works for RV32 as well as RV64. Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
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CI/CD failed because of formatting issues. |
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@ZenithalHourlyRate and @paulidale, please review. |
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I guess it is worth adding RV32 to the CI matrix as well. |
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There is no RV32 cross compiler in Ubuntu. |
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I agree with the code changes.
paulidale
approved these changes
Apr 9, 2026
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This PR fixes several RV32 issues found while validating the RISC-V crypto backends on current master.
Changes:
size_tformatting for the reported RISC-V vector lengthOPENSSL_riscvcap(3)RV32 exampleThe first two changes are real build/portability fixes for RV32.
The documentation cleanup is small, but came out of the same validation pass.
Validation:
Note that RV32 is not fully supported as a target because Ubuntu lacks an RV32 cross-toolchain package.
Also, I don't think there are many real HW RV32 SoCs targeting Linux.
However, we should still keep an eye on it.
Checklist