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deps: V8: cherry-pick 3805a698f7b6
Original commit message:

    PPC/s390: [wasm][liftoff] Always zero-extend 32 bit offsets

    Port 2b77ca200c56667c68895e49c96c10ff77834f09

    Original Commit Message:

        The upper 32 bits of the 64 bit offset register are not guaranteed to be
        cleared, so a zero-extension is needed. We already do the zero-extension
        in the case of explicit bounds checking, but this should also be done if
        the trap handler is enabled.

    R=thibaudm@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com
    BUG=
    LOG=N

    Change-Id: Ife3ae4f93b85fe1b2c76fe4b98fa408b5b51ed71
    Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2929661
    Reviewed-by: Junliang Yan <junyan@redhat.com>
    Commit-Queue: Milad Fa <mfarazma@redhat.com>
    Cr-Commit-Position: refs/heads/master@{#74886}

Refs: v8/v8@3805a69
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targos committed Jul 10, 2021
commit f9f5ff00759f1c095933f435272687198c221879
2 changes: 1 addition & 1 deletion common.gypi
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@

# Reset this number to 0 on major V8 upgrades.
# Increment by one for each non-official patch applied to deps/v8.
'v8_embedder_string': '-node.17',
'v8_embedder_string': '-node.18',

##### V8 defaults for Node.js #####

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3 changes: 2 additions & 1 deletion deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc.h
Original file line number Diff line number Diff line change
Expand Up @@ -137,7 +137,8 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr,
void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
Register offset_reg, uintptr_t offset_imm,
LoadType type, LiftoffRegList pinned,
uint32_t* protected_load_pc, bool is_load_mem) {
uint32_t* protected_load_pc, bool is_load_mem,
bool i64_offset) {
bailout(kUnsupportedArchitecture, "Load");
}

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8 changes: 7 additions & 1 deletion deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h
Original file line number Diff line number Diff line change
Expand Up @@ -277,11 +277,17 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr,
void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr,
Register offset_reg, uintptr_t offset_imm,
LoadType type, LiftoffRegList pinned,
uint32_t* protected_load_pc, bool is_load_mem) {
uint32_t* protected_load_pc, bool is_load_mem,
bool i64_offset) {
UseScratchRegisterScope temps(this);
if (!is_int20(offset_imm)) {
mov(ip, Operand(offset_imm));
if (offset_reg != no_reg) {
if (!i64_offset) {
// Clear the upper 32 bits of the 64 bit offset register.
llgfr(r0, offset_reg);
offset_reg = r0;
}
AddS64(ip, offset_reg);
}
offset_reg = ip;
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