micropython · Gadgetoid · Jul 3, 2026 · Jul 3, 2026 · Jul 3, 2026
diff --git a/lib/pico-sdk b/lib/pico-sdk
diff --git a/ports/rp2/CMakeLists.txt b/ports/rp2/CMakeLists.txt
@@ -170,7 +170,6 @@ set(MICROPY_SOURCE_PORT
     pendsv.c
     rp2_flash.c
     rp2_pio.c
-    rp2_psram.c
     rp2_dma.c
     uart.c
     usbd.c
@@ -569,6 +568,39 @@ if(DEFINED MICROPY_HW_FLASH_STORAGE_BYTES)
     )
 endif()
 
+# PSRAM (RP2350 only) is brought up by the SDK's hardware_psram library at boot
+# (runtime_init). Boards that fit PSRAM set MICROPY_HW_ENABLE_PSRAM and
+# MICROPY_HW_PSRAM_CS_PIN in their mpconfigboard.cmake.
+#
+# Defer to the pico-sdk board header where it configures PSRAM: if it sets a size
+# (PICO_PSRAM_SIZE_BYTES, which the SDK exposes as a CMake variable), use the
+# header's chip-select and size as-is. main.c asserts the header chip-select
+# matches MICROPY_HW_PSRAM_CS_PIN. Otherwise drive the SDK from the downstream
+# config: auto-detect the size on the configured chip-select.
+#
+# MicroPython re-tunes the QMI timing after clock changes (see main.c and
+# modmachine.c); flash programming restores it via the SDK's CS1 setup callback.
+if(PICO_RP2350 AND MICROPY_HW_ENABLE_PSRAM)
+    list(APPEND PICO_SDK_COMPONENTS
+        hardware_psram
+    )
+    target_compile_definitions(${MICROPY_TARGET} PRIVATE
+        MICROPY_HW_ENABLE_PSRAM=1
+    )
+    if(DEFINED MICROPY_HW_PSRAM_CS_PIN)
+        target_compile_definitions(${MICROPY_TARGET} PRIVATE
+            MICROPY_HW_PSRAM_CS_PIN=${MICROPY_HW_PSRAM_CS_PIN}
+        )
+    endif()
+    if(NOT PICO_PSRAM_SIZE_BYTES)
+        # No size configured upstream: auto-detect on the configured chip-select.
+        target_compile_definitions(${MICROPY_TARGET} PRIVATE
+            PICO_PSRAM_CS_PIN=${MICROPY_HW_PSRAM_CS_PIN}
+            PICO_AUTO_DETECT_PSRAM_SIZE=1
+        )
+    endif()
+endif()
+
 # Apply optimisations to performance-critical source code.
 set_source_files_properties(
     ${MICROPY_PY_DIR}/map.c
@@ -632,11 +664,15 @@ endif()
 #  a linker script modification) until we explicitly add  macro calls around the function
 #  defs to move them into RAM.
 if (NOT MICROPY_BOARD_LINKER_SCRIPT)
+    # Use the Pico SDK's include-based ("overridable") default linker script,
+    # supplying only the parts MicroPython needs to change via override paths.
     if(PICO_RP2040)
-        set(MICROPY_BOARD_LINKER_SCRIPT ${CMAKE_CURRENT_LIST_DIR}/memmap_mp_rp2040.ld)
+        pico_add_linker_script_override_path(${MICROPY_TARGET} ${CMAKE_CURRENT_LIST_DIR}/memmap_rp2040)
     elseif(PICO_RP2350)
-        set(MICROPY_BOARD_LINKER_SCRIPT ${CMAKE_CURRENT_LIST_DIR}/memmap_mp_rp2350.ld)
+        pico_add_linker_script_override_path(${MICROPY_TARGET} ${CMAKE_CURRENT_LIST_DIR}/memmap_rp2350)
     endif()
+    pico_add_linker_script_override_path(${MICROPY_TARGET} ${CMAKE_CURRENT_LIST_DIR}/memmap_rp2)
+    set(MICROPY_BOARD_LINKER_SCRIPT ${CMAKE_CURRENT_LIST_DIR}/memmap_mp_rp2.ld)
 endif()
 
 if (PICO_ON_DEVICE AND NOT PICO_NO_FLASH AND NOT PICO_COPY_TO_RAM)

diff --git a/ports/rp2/boards/ADAFRUIT_FEATHER_RP2350/mpconfigboard.cmake b/ports/rp2/boards/ADAFRUIT_FEATHER_RP2350/mpconfigboard.cmake
@@ -11,3 +11,7 @@ endif()
 
 # To change the gpio count for QFN-80
 # set(PICO_NUM_GPIOS 48)
+
+# 8MB PSRAM on GPIO8.
+set(MICROPY_HW_ENABLE_PSRAM 1)
+set(MICROPY_HW_PSRAM_CS_PIN 8)
diff --git a/ports/rp2/boards/ADAFRUIT_FEATHER_RP2350/mpconfigboard.h b/ports/rp2/boards/ADAFRUIT_FEATHER_RP2350/mpconfigboard.h
@@ -10,6 +10,4 @@
 
 // Red user LED GPIO7
 
-// Optional PSRAM on GPIO8
-#define MICROPY_HW_PSRAM_CS_PIN (8)
-#define MICROPY_HW_ENABLE_PSRAM (1)
+// Optional PSRAM on GPIO8 (enabled in mpconfigboard.cmake)
diff --git a/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/mpconfigboard.cmake b/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/mpconfigboard.cmake
@@ -12,3 +12,7 @@ set(MICROPY_FROZEN_MANIFEST ${MICROPY_BOARD_DIR}/manifest.py)
 if(NOT DEFINED MICROPY_HW_FLASH_STORAGE_BYTES)
     set(MICROPY_HW_FLASH_STORAGE_BYTES 14680064)  # 14 * 1024 * 1024
 endif()
+
+# 8MB PSRAM on GPIO0.
+set(MICROPY_HW_ENABLE_PSRAM 1)
+set(MICROPY_HW_PSRAM_CS_PIN 0)
diff --git a/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/mpconfigboard.h b/ports/rp2/boards/SPARKFUN_IOTNODE_LORAWAN_RP2350/mpconfigboard.h
@@ -27,6 +27,3 @@
 #define MICROPY_HW_UART1_RX (5)
 #define MICROPY_HW_UART1_CTS (6)
 #define MICROPY_HW_UART1_RTS (7)
-
-#define MICROPY_HW_PSRAM_CS_PIN (0)
-#define MICROPY_HW_ENABLE_PSRAM (1)
diff --git a/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigboard.cmake b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigboard.cmake
@@ -22,3 +22,7 @@ set(MICROPY_FROZEN_MANIFEST ${MICROPY_BOARD_DIR}/manifest.py)
 if(NOT DEFINED MICROPY_HW_FLASH_STORAGE_BYTES)
     set(MICROPY_HW_FLASH_STORAGE_BYTES 15204352)  # PICO_FLASH_SIZE_BYTES - 1536 * 1024 = 16MB - 1.5MB
 endif()
+
+# 8MB PSRAM on GPIO47.
+set(MICROPY_HW_ENABLE_PSRAM 1)
+set(MICROPY_HW_PSRAM_CS_PIN 47)
diff --git a/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigboard.h b/ports/rp2/boards/SPARKFUN_IOTREDBOARD_RP2350/mpconfigboard.h
@@ -44,9 +44,7 @@
 #define MICROPY_HW_SPI1_MOSI (11)
 #define MICROPY_HW_SPI1_MISO (8)
 
-// PSRAM
-#define MICROPY_HW_PSRAM_CS_PIN (47)
-#define MICROPY_HW_ENABLE_PSRAM (1)
+// PSRAM enabled in mpconfigboard.cmake
 
 // #include "enable_cyw43.h"
 

diff --git a/ports/rp2/boards/SPARKFUN_PROMICRO_RP2350/mpconfigboard.cmake b/ports/rp2/boards/SPARKFUN_PROMICRO_RP2350/mpconfigboard.cmake
@@ -6,3 +6,7 @@ set(PICO_PLATFORM "rp2350")
 if(NOT DEFINED MICROPY_HW_FLASH_STORAGE_BYTES)
     set(MICROPY_HW_FLASH_STORAGE_BYTES 14680064)  # 14 * 1024 * 1024
 endif()
+
+# 8MB PSRAM. The chip-select (GPIO19) and size come from the pico-sdk board
+# header (sparkfun_promicro_rp2350.h).
+set(MICROPY_HW_ENABLE_PSRAM 1)
diff --git a/ports/rp2/boards/SPARKFUN_PROMICRO_RP2350/mpconfigboard.h b/ports/rp2/boards/SPARKFUN_PROMICRO_RP2350/mpconfigboard.h
@@ -20,6 +20,3 @@
 #define MICROPY_HW_SPI0_SCK  (22)
 #define MICROPY_HW_SPI0_MOSI (23)
 #define MICROPY_HW_SPI0_MISO (20)
-
-#define MICROPY_HW_PSRAM_CS_PIN (19)
-#define MICROPY_HW_ENABLE_PSRAM (1)
diff --git a/ports/rp2/boards/SPARKFUN_THINGPLUS_RP2350/mpconfigboard.cmake b/ports/rp2/boards/SPARKFUN_THINGPLUS_RP2350/mpconfigboard.cmake
@@ -17,3 +17,7 @@ set(MICROPY_FROZEN_MANIFEST ${MICROPY_BOARD_DIR}/manifest.py)
 if(NOT DEFINED MICROPY_HW_FLASH_STORAGE_BYTES)
     set(MICROPY_HW_FLASH_STORAGE_BYTES 14680064)  # 14 * 1024 * 1024
 endif()
+
+# 8MB PSRAM. The chip-select (GPIO8) and size come from the pico-sdk board
+# header (sparkfun_thingplus_rp2350.h).
+set(MICROPY_HW_ENABLE_PSRAM 1)
diff --git a/ports/rp2/boards/SPARKFUN_THINGPLUS_RP2350/mpconfigboard.h b/ports/rp2/boards/SPARKFUN_THINGPLUS_RP2350/mpconfigboard.h
@@ -42,6 +42,3 @@ int mp_hal_is_pin_reserved(int n);
 #define MICROPY_HW_UART1_RX (5)
 #define MICROPY_HW_UART1_CTS (6)
 #define MICROPY_HW_UART1_RTS (7)
-
-#define MICROPY_HW_PSRAM_CS_PIN (8)
-#define MICROPY_HW_ENABLE_PSRAM (1)
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/mpconfigboard.cmake b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/mpconfigboard.cmake
@@ -22,3 +22,7 @@ set(MICROPY_FROZEN_MANIFEST ${MICROPY_BOARD_DIR}/manifest.py)
 if(NOT DEFINED MICROPY_HW_FLASH_STORAGE_BYTES)
     set(MICROPY_HW_FLASH_STORAGE_BYTES 15204352)  # PICO_FLASH_SIZE_BYTES - 1536 * 1024 = 16MB - 1.5MB
 endif()
+
+# 8MB PSRAM on GPIO47.
+set(MICROPY_HW_ENABLE_PSRAM 1)
+set(MICROPY_HW_PSRAM_CS_PIN 47)
diff --git a/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/mpconfigboard.h b/ports/rp2/boards/SPARKFUN_XRP_CONTROLLER/mpconfigboard.h
@@ -46,6 +46,3 @@ int mp_hal_is_pin_reserved(int n);
 #define MICROPY_HW_UART1_RX (9)
 #define MICROPY_HW_UART1_CTS (10)
 #define MICROPY_HW_UART1_RTS (11)
-
-#define MICROPY_HW_PSRAM_CS_PIN (47)
-#define MICROPY_HW_ENABLE_PSRAM (1)
diff --git a/ports/rp2/boards/WAVESHARE_RP2350B_CORE/mpconfigboard.cmake b/ports/rp2/boards/WAVESHARE_RP2350B_CORE/mpconfigboard.cmake
@@ -14,3 +14,7 @@ set(PICO_FLASH_SIZE_BYTES 16777216)
 if(NOT DEFINED MICROPY_HW_FLASH_STORAGE_BYTES)
     set(MICROPY_HW_FLASH_STORAGE_BYTES 14680064)  # 14 * 1024 * 1024
 endif()
+
+# 8MB PSRAM on GPIO47.
+set(MICROPY_HW_ENABLE_PSRAM 1)
+set(MICROPY_HW_PSRAM_CS_PIN 47)
diff --git a/ports/rp2/boards/WAVESHARE_RP2350B_CORE/mpconfigboard.h b/ports/rp2/boards/WAVESHARE_RP2350B_CORE/mpconfigboard.h
@@ -2,8 +2,6 @@
 #define MICROPY_HW_BOARD_NAME "Waveshare RP2350B Core"
 #define PICO_FLASH_SIZE_BYTES (16 * 1024 * 1024)
 
-#define MICROPY_HW_PSRAM_CS_PIN (47)
-#define MICROPY_HW_ENABLE_PSRAM (1)
 
 // Override machine_uart.c definitions.
 // See waveshare_rp2350b.h and note that the PICO_DEFAULT_UART configuration

diff --git a/ports/rp2/main.c b/ports/rp2/main.c
@@ -48,7 +48,6 @@
 #include "mpnetworkport.h"
 #include "genhdr/mpversion.h"
 #include "mp_usbd.h"
-#include "rp2_psram.h"
 
 #include "pico/stdlib.h"
 #include "pico/binary_info.h"
@@ -67,9 +66,22 @@
 #endif
 #include "pico/aon_timer.h"
 #include "shared/timeutils/timeutils.h"
+#if MICROPY_HW_ENABLE_PSRAM
+#include "hardware/psram.h"
+// When the pico-sdk board header configures the PSRAM chip-select, make sure the
+// downstream MicroPython config (MICROPY_HW_PSRAM_CS_PIN) agrees with it.
+#if defined(PICO_PSRAM_CS_PIN) && defined(MICROPY_HW_PSRAM_CS_PIN) && (PICO_PSRAM_CS_PIN != MICROPY_HW_PSRAM_CS_PIN)
+#error "MICROPY_HW_PSRAM_CS_PIN does not match the board header's PICO_PSRAM_CS_PIN"
+#endif
+#endif
 
 extern uint8_t __StackTop, __StackBottom;
 extern uint8_t __GcHeapStart, __GcHeapEnd;
+#if MICROPY_HW_ENABLE_PSRAM
+// Provided by the SDK's PSRAM linker sections: __psram_start__ is ORIGIN(PSRAM)
+// (the PSRAM base) and __psram_end__ is the end of any __in_psram data.
+extern uint8_t __psram_start__, __psram_end__;
+#endif
 
 // Embed version info in the binary in machine readable form
 bi_decl(bi_program_version_string(MICROPY_GIT_TAG));
@@ -99,7 +111,12 @@ int main(int argc, char **argv) {
     rp2_flash_set_timing();
 
     #if MICROPY_HW_ENABLE_PSRAM
-    size_t psram_size = psram_init(MICROPY_HW_PSRAM_CS_PIN);
+    // The SDK's runtime_init brought PSRAM up at the boot clock; re-tune the QMI
+    // timing now that the system clock has been set to its final value.
+    if (psram_is_available()) {
+        psram_configure_params(PICO_DEFAULT_PSRAM_MAX_FREQ, PICO_DEFAULT_PSRAM_MAX_SELECT, PICO_DEFAULT_PSRAM_MIN_DESELECT);
+        psram_reinitialize();
+    }
     #endif
 
     #if MICROPY_HW_ENABLE_UART_REPL
@@ -131,12 +148,16 @@ int main(int argc, char **argv) {
     mp_cstack_init_with_top(&__StackTop, &__StackTop - &__StackBottom);
 
     #if MICROPY_HW_ENABLE_PSRAM
+    size_t psram_size = psram_get_size(); // 0 if PSRAM was not brought up
     if (psram_size) {
+        // Use PSRAM from the end of any __in_psram data up to the top of the chip.
+        void *psram_heap_start = &__psram_end__;
+        void *psram_heap_end = &__psram_start__ + psram_size;
         #if MICROPY_GC_SPLIT_HEAP
         gc_init(&__GcHeapStart, &__GcHeapEnd);
-        gc_add((void *)PSRAM_BASE, (void *)(PSRAM_BASE + psram_size));
+        gc_add(psram_heap_start, psram_heap_end);
         #else
-        gc_init((void *)PSRAM_BASE, (void *)(PSRAM_BASE + psram_size));
+        gc_init(psram_heap_start, psram_heap_end);
         #endif
     } else {
         gc_init(&__GcHeapStart, &__GcHeapEnd);

diff --git a/ports/rp2/memmap_mp_rp2.ld b/ports/rp2/memmap_mp_rp2.ld
@@ -0,0 +1,18 @@
+/* MicroPython linker script for RP2040 and RP2350.
+
+   This uses the Pico SDK's include-based ("overridable") default linker script
+   (memmap_default.incl) and only overrides the parts MicroPython needs to
+   change. The per-part overrides live in:
+     memmap_rp2/     - common to both chips
+     memmap_rp2040/  - RP2040 only
+     memmap_rp2350/  - RP2350 only
+   These directories are added to the linker script search path (ahead of the
+   SDK's) by pico_add_linker_script_override_path() in CMakeLists.txt. */
+
+/* Delete scratch X and expand scratch Y, so all of the C stack lives in a
+   single 8K scratch region (matches the previous hand-written scripts). */
+SCRATCH_X_LENGTH = 0;
+SCRATCH_Y_ORIGIN = SCRATCH_X_ORIGIN_DEFAULT;
+SCRATCH_Y_LENGTH = SCRATCH_Y_LENGTH_DEFAULT*2;
+
+INCLUDE "memmap_default.incl"