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Every hardware engineer who has tried traditional maze autorouters (Freerouting, legacy push-and-shove scripts, or pure LLM coordinate generators) knows the trap:
A router that reaches 94% net completion with 45 DRC clearance violations has not solved your board — it has boxed in the hardest 6% of nets (0.40 mm–0.50 mm fine-pitch QFP/QFN/BGA pins, off-axis rotated connectors, and split return planes) so badly that ripping up and fixing the remaining airwires by hand takes longer than routing from scratch.
Our Benchmark Standard (Strict 100.0% + 0 DRC): A PCB routing engine only passes a board when native kicad-cli pcb drc --severity-all (after fresh copper zone refill via pcbnew.ZONE_FILLER) reports:
0 Unconnected Items (100.0% geometric net completion)
Have an unrouted KiCad (.kicad_pcb), Altium (.PcbDoc), Eagle (.brd), or Specctra (.dsn) board that stalled Freerouting?
Drop It into the Browser ($0 Upfront): https://calligraphyeda.com (or click one of the 1-Tap Live Demo Boards at the top of the page — even on mobile).
Inspect the 350-DPI Copper Proof & 3D WebGL View: Zoom into every fine-pitch pad entry, differential pair, and ground return transition before paying a cent.
Open-Hardware & First-Board Grants:
OPENHW ($0.00 Free Unlock): Working on an open-source hardware board with a public GitHub repo? Enter code OPENHW with your repo URL to unlock the full routed .kicad_pcb + Gerbers + IPC-D-356 + 3D HTML5 bundle for $0.00 (5/day).
PROTOTYPE1 ($1.00 First-Board Prototype Pass): Unlock your first private 2-layer breakout board (<= 150 pads) for $1.00 USDC on Base (5/day).
1-Line Claude Code / Cursor MCP Co-Processor:
claude mcp add --transport http calligraphy-eda https://calligraphyeda.com/api/v1/mcp
Suite A — 20 / 20PCBench Tier T Challenge & Frontier Suite (100.0% Completion, 0 DRC)
The 20 open-source boards below comprise the community PCBench benchmark and Frontier challenge suite (including the 10 Frontier boards t11–t20 where standard open-source routers leave unrouted nets, create clearance violations, or stall on multi-pass congestion):
#
Board ID (Open-Source Hardware)
Routed Segments
Vias
Unconnected Items
Native KiCad 9 Copper DRC
Max Coordinate Drift
01
t01_1-Wire-Wing-pcb_1-Wire_Wing
280
15
0 (100.0%)
0
0.00000 mm
02
t02_4_digit_hex_display_4_digit_display
837
65
0 (100.0%)
0
0.00000 mm
03
t03_CANadapter_CANadapter
346
9
0 (100.0%)
0
0.00004 mm
04
t04_ChirpHardware_chirp
537
32
0 (100.0%)
0
0.00007 mm
05
t05_DAC-ADAU1966_DAC-ADAU1966 (4L 16-Ch Studio DAC)
Never trust a screenshot without running kicad-cli pcb drc --severity-all yourself. Use verify_drc_zero.py on any routed .kicad_pcb file to refill all copper zones on a temporary copy and verify unconnected_count == 0 and copper_drc_error_count == 0: