WebAssembly SIMD-specific arithmetic instructions
WebAssembly SIMD-specific arithmetic instructions.
Add adjacent pairs
extadd_pairwise_i8x16_s-
Adds each adjacent pair of lanes of a signed
v128i8x16value interpretation, outputting the results into ani16x8value interpretation. extadd_pairwise_i8x16_u-
Adds each adjacent pair of lanes of an unsigned
v128i8x16value interpretation, outputting the results into ani16x8value interpretation. extadd_pairwise_i16x8_s-
Adds each adjacent pair of lanes of a signed
v128i16x8value interpretation, outputting the results into ani32x4value interpretation. extadd_pairwise_i16x8_u-
Adds each adjacent pair of lanes of an unsigned
v128i16x8value interpretation, outputting the results into ani32x4value interpretation.
Integer dot product
dot_i16x8_s-
Performs a dot product calculation on two signed
v128i16x8value interpretations. The corresponding lanes of the input values are multiplied together, then each adjacent pair of products are added together. The four results of these additions are output as ani32x4value interpretation.
Lane-wise rounding average
avgr_u-
Performs a rounding average of two unsigned
v128value interpretations. Each lane of the output value is(a + b + 1) / 2, rounded up (ceiling division).
Lane-wise saturating rounding multiplication
q15mulr_sat_s-
performs a lane-wise saturating rounding multiplication in Q15 format on two signed
v128i16x8value interpretations — clamping the output to the range allowed by the value type (a singlei16x8value interpretation).
Min and max
max_s-
Compares two
v128signed integer value interpretations and returns a new interpretation with each lane set to the greater of that lane index's value on the two inputs. max_u-
Compares two
v128unsigned integer value interpretations and returns a new interpretation with each lane set to the greater of that lane index's value on the two inputs. min_s-
Compares two
v128signed integer value interpretations and returns a new interpretation with each lane set to the lower of that lane index's value on the two inputs. min_u-
Compares two
v128unsigned integer value interpretations and returns a new interpretation with each lane set to the lower of that lane index's value on the two inputs. pmax-
Compares two
v128floating point value interpretations and returns a new interpretation with each output lane set to the larger of the corresponding input lanes. pmin-
Compares two
v128floating point value interpretations and returns a new interpretation with each output lane set to the smaller of the corresponding input lanes.
Multiply and extend
extmul_low_i8x16_s-
Takes lanes 0–7 of two signed
v128i8x16value interpretations, multiplies the values in the corresponding lanes, and outputs the result of those operations into ani16x8value interpretation. extmul_high_i8x16_s-
Takes lanes 8–15 of two signed
v128i8x16value interpretations, multiplies the values in the corresponding lanes, and outputs the result of those operations into ani16x8value interpretation. extmul_low_i8x16_u-
Takes lanes 0–7 of two unsigned
v128i8x16value interpretations, multiplies the values in the corresponding lanes, and outputs the result of those operations into ani16x8value interpretation. extmul_high_i8x16_u-
Takes lanes 8–15 of two unsigned
v128i8x16value interpretations, multiplies the values in the corresponding lanes, and outputs the result of those operations into ani16x8value interpretation. extmul_low_i16x8_s-
Takes lanes 0–3 of two signed
v128i16x8value interpretations, multiplies the values in the corresponding lanes, and outputs the result of those operations into ani32x4value interpretation. extmul_high_i16x8_s-
Takes lanes 4–7 of two signed
v128i16x8value interpretations, multiplies the values in the corresponding lanes, and outputs the result of those operations into ani32x4value interpretation. extmul_low_i16x8_u-
Takes lanes 0–3 of two unsigned
v128i16x8value interpretations, multiplies the values in the corresponding lanes, and outputs the result of those operations into ani32x4value interpretation. extmul_high_i16x8_u-
Takes lanes 4–7 of two unsigned
v128i16x8value interpretations, multiplies the values in the corresponding lanes, and outputs the result of those operations into ani32x4value interpretation. extmul_low_i32x4_s-
Takes lanes 0–1 of two signed
v128i32x4value interpretations, multiplies the values in the corresponding lanes, and outputs the result of those operations into ani64x2value interpretation. extmul_high_i32x4_s-
Takes lanes 2–3 of two signed
v128i32x4value interpretations, multiplies the values in the corresponding lanes, and outputs the result of those operations into ani64x2value interpretation. extmul_low_i32x4_u-
Takes lanes 0–1 of two unsigned
v128i32x4value interpretations, multiplies the values in the corresponding lanes, and outputs the result of those operations into ani64x2value interpretation. extmul_high_i32x4_u-
Takes lanes 2–3 of two unsigned
v128i32x4value interpretations, multiplies the values in the corresponding lanes, and outputs the result of those operations into ani64x2value interpretation.
Saturated addition and subtraction
add_sat_s-
Performs a saturating addition of two signed
v128value interpretations — clamping the output to the range allowed by the value type. Each lane of the output value is the result of adding the corresponding lanes of the input value. add_sat_u-
Performs a saturating addition of two unsigned
v128value interpretations — clamping the output to the range allowed by the value type. Each lane of the output value is the result of adding the corresponding lanes of the input value. sub_sat_s-
Performs a saturating subtraction of two signed
v128value interpretations — clamping the output to the range allowed by the value type. Each lane of the output value is the result of subtracting the corresponding lane of the second input from the corresponding lane of the first input. sub_sat_u-
performs a saturating subtraction of two unsigned
v128value interpretations — clamping the output to the range allowed by the value type. Each lane of the output value is the result of subtracting the corresponding lane of the second input from the corresponding lane of the first input.