1// SPDX-License-Identifier: GPL-2.0
2// Copyright 2017 Linutronix GmbH, Thomas Gleixner <tglx@kernel.org>
3
4#include <linux/irqdomain.h>
5#include <linux/irq.h>
6#include <linux/uaccess.h>
7
8#include "internals.h"
9
10static struct dentry *irq_dir;
11
12void irq_debug_show_bits(struct seq_file *m, int ind, unsigned int state,
13 const struct irq_bit_descr *sd, int size)
14{
15 int i;
16
17 for (i = 0; i < size; i++, sd++) {
18 if (state & sd->mask)
19 seq_printf(m, fmt: "%*s%s\n", ind + 12, "", sd->name);
20 }
21}
22
23#ifdef CONFIG_SMP
24static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc)
25{
26 struct irq_data *data = irq_desc_get_irq_data(desc);
27 const struct cpumask *msk;
28
29 msk = irq_data_get_affinity_mask(d: data);
30 seq_printf(m, fmt: "affinity: %*pbl\n", cpumask_pr_args(msk));
31#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
32 msk = irq_data_get_effective_affinity_mask(d: data);
33 seq_printf(m, fmt: "effectiv: %*pbl\n", cpumask_pr_args(msk));
34#endif
35#ifdef CONFIG_GENERIC_PENDING_IRQ
36 msk = desc->pending_mask;
37 seq_printf(m, fmt: "pending: %*pbl\n", cpumask_pr_args(msk));
38#endif
39}
40#else
41static void irq_debug_show_masks(struct seq_file *m, struct irq_desc *desc) { }
42#endif
43
44static const struct irq_bit_descr irqchip_flags[] = {
45 BIT_MASK_DESCR(IRQCHIP_SET_TYPE_MASKED),
46 BIT_MASK_DESCR(IRQCHIP_EOI_IF_HANDLED),
47 BIT_MASK_DESCR(IRQCHIP_MASK_ON_SUSPEND),
48 BIT_MASK_DESCR(IRQCHIP_ONOFFLINE_ENABLED),
49 BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE),
50 BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE),
51 BIT_MASK_DESCR(IRQCHIP_EOI_THREADED),
52 BIT_MASK_DESCR(IRQCHIP_SUPPORTS_LEVEL_MSI),
53 BIT_MASK_DESCR(IRQCHIP_SUPPORTS_NMI),
54 BIT_MASK_DESCR(IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND),
55 BIT_MASK_DESCR(IRQCHIP_IMMUTABLE),
56 BIT_MASK_DESCR(IRQCHIP_MOVE_DEFERRED),
57};
58
59static void
60irq_debug_show_chip(struct seq_file *m, struct irq_data *data, int ind)
61{
62 struct irq_chip *chip = data->chip;
63
64 if (!chip) {
65 seq_printf(m, fmt: "chip: None\n");
66 return;
67 }
68 seq_printf(m, fmt: "%*schip: ", ind, "");
69 if (chip->irq_print_chip)
70 chip->irq_print_chip(data, m);
71 else
72 seq_printf(m, fmt: "%s", chip->name);
73 seq_printf(m, fmt: "\n%*sflags: 0x%lx\n", ind + 1, "", chip->flags);
74 irq_debug_show_bits(m, ind, state: chip->flags, sd: irqchip_flags,
75 ARRAY_SIZE(irqchip_flags));
76}
77
78static void
79irq_debug_show_data(struct seq_file *m, struct irq_data *data, int ind)
80{
81 seq_printf(m, fmt: "%*sdomain: %s\n", ind, "",
82 data->domain ? data->domain->name : "");
83 seq_printf(m, fmt: "%*shwirq: 0x%lx\n", ind + 1, "", data->hwirq);
84 irq_debug_show_chip(m, data, ind: ind + 1);
85 if (data->domain && data->domain->ops && data->domain->ops->debug_show)
86 data->domain->ops->debug_show(m, NULL, data, ind + 1);
87#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
88 if (!data->parent_data)
89 return;
90 seq_printf(m, fmt: "%*sparent:\n", ind + 1, "");
91 irq_debug_show_data(m, data: data->parent_data, ind: ind + 4);
92#endif
93}
94
95static const struct irq_bit_descr irqdata_states[] = {
96 BIT_MASK_DESCR(IRQ_TYPE_EDGE_RISING),
97 BIT_MASK_DESCR(IRQ_TYPE_EDGE_FALLING),
98 BIT_MASK_DESCR(IRQ_TYPE_LEVEL_HIGH),
99 BIT_MASK_DESCR(IRQ_TYPE_LEVEL_LOW),
100 BIT_MASK_DESCR(IRQD_LEVEL),
101
102 BIT_MASK_DESCR(IRQD_ACTIVATED),
103 BIT_MASK_DESCR(IRQD_IRQ_STARTED),
104 BIT_MASK_DESCR(IRQD_IRQ_DISABLED),
105 BIT_MASK_DESCR(IRQD_IRQ_MASKED),
106 BIT_MASK_DESCR(IRQD_IRQ_INPROGRESS),
107
108 BIT_MASK_DESCR(IRQD_PER_CPU),
109 BIT_MASK_DESCR(IRQD_NO_BALANCING),
110
111 BIT_MASK_DESCR(IRQD_SINGLE_TARGET),
112 BIT_MASK_DESCR(IRQD_AFFINITY_SET),
113 BIT_MASK_DESCR(IRQD_SETAFFINITY_PENDING),
114 BIT_MASK_DESCR(IRQD_AFFINITY_MANAGED),
115 BIT_MASK_DESCR(IRQD_AFFINITY_ON_ACTIVATE),
116 BIT_MASK_DESCR(IRQD_MANAGED_SHUTDOWN),
117 BIT_MASK_DESCR(IRQD_CAN_RESERVE),
118
119 BIT_MASK_DESCR(IRQD_FORWARDED_TO_VCPU),
120
121 BIT_MASK_DESCR(IRQD_WAKEUP_STATE),
122 BIT_MASK_DESCR(IRQD_WAKEUP_ARMED),
123
124 BIT_MASK_DESCR(IRQD_DEFAULT_TRIGGER_SET),
125
126 BIT_MASK_DESCR(IRQD_HANDLE_ENFORCE_IRQCTX),
127
128 BIT_MASK_DESCR(IRQD_IRQ_ENABLED_ON_SUSPEND),
129
130 BIT_MASK_DESCR(IRQD_RESEND_WHEN_IN_PROGRESS),
131};
132
133static const struct irq_bit_descr irqdesc_states[] = {
134 BIT_MASK_DESCR(_IRQ_NOPROBE),
135 BIT_MASK_DESCR(_IRQ_NOREQUEST),
136 BIT_MASK_DESCR(_IRQ_NOTHREAD),
137 BIT_MASK_DESCR(_IRQ_NOAUTOEN),
138 BIT_MASK_DESCR(_IRQ_NESTED_THREAD),
139 BIT_MASK_DESCR(_IRQ_PER_CPU_DEVID),
140 BIT_MASK_DESCR(_IRQ_IS_POLLED),
141 BIT_MASK_DESCR(_IRQ_DISABLE_UNLAZY),
142 BIT_MASK_DESCR(_IRQ_HIDDEN),
143};
144
145static const struct irq_bit_descr irqdesc_istates[] = {
146 BIT_MASK_DESCR(IRQS_AUTODETECT),
147 BIT_MASK_DESCR(IRQS_SPURIOUS_DISABLED),
148 BIT_MASK_DESCR(IRQS_POLL_INPROGRESS),
149 BIT_MASK_DESCR(IRQS_ONESHOT),
150 BIT_MASK_DESCR(IRQS_REPLAY),
151 BIT_MASK_DESCR(IRQS_WAITING),
152 BIT_MASK_DESCR(IRQS_PENDING),
153 BIT_MASK_DESCR(IRQS_SUSPENDED),
154 BIT_MASK_DESCR(IRQS_NMI),
155};
156
157
158static int irq_debug_show(struct seq_file *m, void *p)
159{
160 struct irq_desc *desc = m->private;
161 struct irq_data *data;
162
163 guard(raw_spinlock_irq)(l: &desc->lock);
164 data = irq_desc_get_irq_data(desc);
165 seq_printf(m, fmt: "handler: %ps\n", desc->handle_irq);
166 seq_printf(m, fmt: "device: %s\n", desc->dev_name);
167 seq_printf(m, fmt: "status: 0x%08x\n", desc->status_use_accessors);
168 irq_debug_show_bits(m, ind: 0, state: desc->status_use_accessors, sd: irqdesc_states,
169 ARRAY_SIZE(irqdesc_states));
170 seq_printf(m, fmt: "istate: 0x%08x\n", desc->istate);
171 irq_debug_show_bits(m, ind: 0, state: desc->istate, sd: irqdesc_istates,
172 ARRAY_SIZE(irqdesc_istates));
173 seq_printf(m, fmt: "ddepth: %u\n", desc->depth);
174 seq_printf(m, fmt: "wdepth: %u\n", desc->wake_depth);
175 seq_printf(m, fmt: "dstate: 0x%08x\n", irqd_get(d: data));
176 irq_debug_show_bits(m, ind: 0, state: irqd_get(d: data), sd: irqdata_states,
177 ARRAY_SIZE(irqdata_states));
178 seq_printf(m, fmt: "node: %d\n", irq_data_get_node(d: data));
179 irq_debug_show_masks(m, desc);
180 irq_debug_show_data(m, data, ind: 0);
181 return 0;
182}
183
184static int irq_debug_open(struct inode *inode, struct file *file)
185{
186 return single_open(file, irq_debug_show, inode->i_private);
187}
188
189static ssize_t irq_debug_write(struct file *file, const char __user *user_buf,
190 size_t count, loff_t *ppos)
191{
192 struct irq_desc *desc = file_inode(f: file)->i_private;
193 char buf[8] = { 0, };
194 size_t size;
195
196 size = min(sizeof(buf) - 1, count);
197 if (copy_from_user(to: buf, from: user_buf, n: size))
198 return -EFAULT;
199
200 if (!strncmp(buf, "trigger", size)) {
201 int err = irq_inject_interrupt(irq: irq_desc_get_irq(desc));
202
203 return err ? err : count;
204 }
205
206 return count;
207}
208
209static const struct file_operations dfs_irq_ops = {
210 .open = irq_debug_open,
211 .write = irq_debug_write,
212 .read = seq_read,
213 .llseek = seq_lseek,
214 .release = single_release,
215};
216
217void irq_debugfs_copy_devname(int irq, struct device *dev)
218{
219 struct irq_desc *desc = irq_to_desc(irq);
220 const char *name = dev_name(dev);
221
222 if (name)
223 desc->dev_name = kstrdup(s: name, GFP_KERNEL);
224}
225
226void irq_add_debugfs_entry(unsigned int irq, struct irq_desc *desc)
227{
228 char name [12];
229
230 if (!irq_dir || !desc || desc->debugfs_file)
231 return;
232
233 sprintf(buf: name, fmt: "%u", irq);
234 desc->debugfs_file = debugfs_create_file(name, 0644, irq_dir, desc,
235 &dfs_irq_ops);
236}
237
238static int __init irq_debugfs_init(void)
239{
240 struct dentry *root_dir;
241 int irq;
242
243 root_dir = debugfs_create_dir(name: "irq", NULL);
244
245 irq_domain_debugfs_init(root: root_dir);
246
247 irq_dir = debugfs_create_dir(name: "irqs", parent: root_dir);
248
249 irq_lock_sparse();
250 for_each_active_irq(irq)
251 irq_add_debugfs_entry(irq, desc: irq_to_desc(irq));
252 irq_unlock_sparse();
253
254 return 0;
255}
256__initcall(irq_debugfs_init);
257

source code of linux/kernel/irq/debugfs.c