| 1 | /* |
| 2 | * Copyright (c) 2018, Mellanox Technologies inc. All rights reserved. |
| 3 | * |
| 4 | * This software is available to you under a choice of one of two |
| 5 | * licenses. You may choose to be licensed under the terms of the GNU |
| 6 | * General Public License (GPL) Version 2, available from the file |
| 7 | * COPYING in the main directory of this source tree, or the |
| 8 | * OpenIB.org BSD license below: |
| 9 | * |
| 10 | * Redistribution and use in source and binary forms, with or |
| 11 | * without modification, are permitted provided that the following |
| 12 | * conditions are met: |
| 13 | * |
| 14 | * - Redistributions of source code must retain the above |
| 15 | * copyright notice, this list of conditions and the following |
| 16 | * disclaimer. |
| 17 | * |
| 18 | * - Redistributions in binary form must reproduce the above |
| 19 | * copyright notice, this list of conditions and the following |
| 20 | * disclaimer in the documentation and/or other materials |
| 21 | * provided with the distribution. |
| 22 | * |
| 23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS |
| 27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN |
| 28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN |
| 29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 30 | * SOFTWARE. |
| 31 | */ |
| 32 | |
| 33 | #ifndef MLX5_USER_IOCTL_CMDS_H |
| 34 | #define MLX5_USER_IOCTL_CMDS_H |
| 35 | |
| 36 | #include <linux/types.h> |
| 37 | #include <rdma/ib_user_ioctl_cmds.h> |
| 38 | |
| 39 | enum mlx5_ib_create_flow_action_attrs { |
| 40 | /* This attribute belong to the driver namespace */ |
| 41 | MLX5_IB_ATTR_CREATE_FLOW_ACTION_FLAGS = (1U << UVERBS_ID_NS_SHIFT), |
| 42 | }; |
| 43 | |
| 44 | enum mlx5_ib_dm_methods { |
| 45 | MLX5_IB_METHOD_DM_MAP_OP_ADDR = (1U << UVERBS_ID_NS_SHIFT), |
| 46 | MLX5_IB_METHOD_DM_QUERY, |
| 47 | }; |
| 48 | |
| 49 | enum mlx5_ib_dm_map_op_addr_attrs { |
| 50 | MLX5_IB_ATTR_DM_MAP_OP_ADDR_REQ_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 51 | MLX5_IB_ATTR_DM_MAP_OP_ADDR_REQ_OP, |
| 52 | MLX5_IB_ATTR_DM_MAP_OP_ADDR_RESP_START_OFFSET, |
| 53 | MLX5_IB_ATTR_DM_MAP_OP_ADDR_RESP_PAGE_INDEX, |
| 54 | }; |
| 55 | |
| 56 | enum mlx5_ib_query_dm_attrs { |
| 57 | MLX5_IB_ATTR_QUERY_DM_REQ_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 58 | MLX5_IB_ATTR_QUERY_DM_RESP_START_OFFSET, |
| 59 | MLX5_IB_ATTR_QUERY_DM_RESP_PAGE_INDEX, |
| 60 | MLX5_IB_ATTR_QUERY_DM_RESP_LENGTH, |
| 61 | }; |
| 62 | |
| 63 | enum mlx5_ib_alloc_dm_attrs { |
| 64 | MLX5_IB_ATTR_ALLOC_DM_RESP_START_OFFSET = (1U << UVERBS_ID_NS_SHIFT), |
| 65 | MLX5_IB_ATTR_ALLOC_DM_RESP_PAGE_INDEX, |
| 66 | MLX5_IB_ATTR_ALLOC_DM_REQ_TYPE, |
| 67 | }; |
| 68 | |
| 69 | enum mlx5_ib_devx_methods { |
| 70 | MLX5_IB_METHOD_DEVX_OTHER = (1U << UVERBS_ID_NS_SHIFT), |
| 71 | MLX5_IB_METHOD_DEVX_QUERY_UAR, |
| 72 | MLX5_IB_METHOD_DEVX_QUERY_EQN, |
| 73 | MLX5_IB_METHOD_DEVX_SUBSCRIBE_EVENT, |
| 74 | }; |
| 75 | |
| 76 | enum mlx5_ib_devx_other_attrs { |
| 77 | MLX5_IB_ATTR_DEVX_OTHER_CMD_IN = (1U << UVERBS_ID_NS_SHIFT), |
| 78 | MLX5_IB_ATTR_DEVX_OTHER_CMD_OUT, |
| 79 | }; |
| 80 | |
| 81 | enum mlx5_ib_devx_obj_create_attrs { |
| 82 | MLX5_IB_ATTR_DEVX_OBJ_CREATE_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 83 | MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_IN, |
| 84 | MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, |
| 85 | }; |
| 86 | |
| 87 | enum mlx5_ib_devx_query_uar_attrs { |
| 88 | MLX5_IB_ATTR_DEVX_QUERY_UAR_USER_IDX = (1U << UVERBS_ID_NS_SHIFT), |
| 89 | MLX5_IB_ATTR_DEVX_QUERY_UAR_DEV_IDX, |
| 90 | }; |
| 91 | |
| 92 | enum mlx5_ib_devx_obj_destroy_attrs { |
| 93 | MLX5_IB_ATTR_DEVX_OBJ_DESTROY_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 94 | }; |
| 95 | |
| 96 | enum mlx5_ib_devx_obj_modify_attrs { |
| 97 | MLX5_IB_ATTR_DEVX_OBJ_MODIFY_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 98 | MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_IN, |
| 99 | MLX5_IB_ATTR_DEVX_OBJ_MODIFY_CMD_OUT, |
| 100 | }; |
| 101 | |
| 102 | enum mlx5_ib_devx_obj_query_attrs { |
| 103 | MLX5_IB_ATTR_DEVX_OBJ_QUERY_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 104 | MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_IN, |
| 105 | MLX5_IB_ATTR_DEVX_OBJ_QUERY_CMD_OUT, |
| 106 | }; |
| 107 | |
| 108 | enum mlx5_ib_devx_obj_query_async_attrs { |
| 109 | MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 110 | MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_CMD_IN, |
| 111 | MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_FD, |
| 112 | MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_WR_ID, |
| 113 | MLX5_IB_ATTR_DEVX_OBJ_QUERY_ASYNC_OUT_LEN, |
| 114 | }; |
| 115 | |
| 116 | enum mlx5_ib_devx_subscribe_event_attrs { |
| 117 | MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 118 | MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_OBJ_HANDLE, |
| 119 | MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_TYPE_NUM_LIST, |
| 120 | MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_FD_NUM, |
| 121 | MLX5_IB_ATTR_DEVX_SUBSCRIBE_EVENT_COOKIE, |
| 122 | }; |
| 123 | |
| 124 | enum mlx5_ib_devx_query_eqn_attrs { |
| 125 | MLX5_IB_ATTR_DEVX_QUERY_EQN_USER_VEC = (1U << UVERBS_ID_NS_SHIFT), |
| 126 | MLX5_IB_ATTR_DEVX_QUERY_EQN_DEV_EQN, |
| 127 | }; |
| 128 | |
| 129 | enum mlx5_ib_devx_obj_methods { |
| 130 | MLX5_IB_METHOD_DEVX_OBJ_CREATE = (1U << UVERBS_ID_NS_SHIFT), |
| 131 | MLX5_IB_METHOD_DEVX_OBJ_DESTROY, |
| 132 | MLX5_IB_METHOD_DEVX_OBJ_MODIFY, |
| 133 | MLX5_IB_METHOD_DEVX_OBJ_QUERY, |
| 134 | MLX5_IB_METHOD_DEVX_OBJ_ASYNC_QUERY, |
| 135 | }; |
| 136 | |
| 137 | enum mlx5_ib_var_alloc_attrs { |
| 138 | MLX5_IB_ATTR_VAR_OBJ_ALLOC_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 139 | MLX5_IB_ATTR_VAR_OBJ_ALLOC_MMAP_OFFSET, |
| 140 | MLX5_IB_ATTR_VAR_OBJ_ALLOC_MMAP_LENGTH, |
| 141 | MLX5_IB_ATTR_VAR_OBJ_ALLOC_PAGE_ID, |
| 142 | }; |
| 143 | |
| 144 | enum mlx5_ib_var_obj_destroy_attrs { |
| 145 | MLX5_IB_ATTR_VAR_OBJ_DESTROY_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 146 | }; |
| 147 | |
| 148 | enum mlx5_ib_var_obj_methods { |
| 149 | MLX5_IB_METHOD_VAR_OBJ_ALLOC = (1U << UVERBS_ID_NS_SHIFT), |
| 150 | MLX5_IB_METHOD_VAR_OBJ_DESTROY, |
| 151 | }; |
| 152 | |
| 153 | enum mlx5_ib_uar_alloc_attrs { |
| 154 | MLX5_IB_ATTR_UAR_OBJ_ALLOC_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 155 | MLX5_IB_ATTR_UAR_OBJ_ALLOC_TYPE, |
| 156 | MLX5_IB_ATTR_UAR_OBJ_ALLOC_MMAP_OFFSET, |
| 157 | MLX5_IB_ATTR_UAR_OBJ_ALLOC_MMAP_LENGTH, |
| 158 | MLX5_IB_ATTR_UAR_OBJ_ALLOC_PAGE_ID, |
| 159 | }; |
| 160 | |
| 161 | enum mlx5_ib_uar_obj_destroy_attrs { |
| 162 | MLX5_IB_ATTR_UAR_OBJ_DESTROY_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 163 | }; |
| 164 | |
| 165 | enum mlx5_ib_uar_obj_methods { |
| 166 | MLX5_IB_METHOD_UAR_OBJ_ALLOC = (1U << UVERBS_ID_NS_SHIFT), |
| 167 | MLX5_IB_METHOD_UAR_OBJ_DESTROY, |
| 168 | }; |
| 169 | |
| 170 | enum mlx5_ib_devx_umem_reg_attrs { |
| 171 | MLX5_IB_ATTR_DEVX_UMEM_REG_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 172 | MLX5_IB_ATTR_DEVX_UMEM_REG_ADDR, |
| 173 | MLX5_IB_ATTR_DEVX_UMEM_REG_LEN, |
| 174 | MLX5_IB_ATTR_DEVX_UMEM_REG_ACCESS, |
| 175 | MLX5_IB_ATTR_DEVX_UMEM_REG_OUT_ID, |
| 176 | MLX5_IB_ATTR_DEVX_UMEM_REG_PGSZ_BITMAP, |
| 177 | MLX5_IB_ATTR_DEVX_UMEM_REG_DMABUF_FD, |
| 178 | }; |
| 179 | |
| 180 | enum mlx5_ib_devx_umem_dereg_attrs { |
| 181 | MLX5_IB_ATTR_DEVX_UMEM_DEREG_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 182 | }; |
| 183 | |
| 184 | enum mlx5_ib_pp_obj_methods { |
| 185 | MLX5_IB_METHOD_PP_OBJ_ALLOC = (1U << UVERBS_ID_NS_SHIFT), |
| 186 | MLX5_IB_METHOD_PP_OBJ_DESTROY, |
| 187 | }; |
| 188 | |
| 189 | enum mlx5_ib_pp_alloc_attrs { |
| 190 | MLX5_IB_ATTR_PP_OBJ_ALLOC_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 191 | MLX5_IB_ATTR_PP_OBJ_ALLOC_CTX, |
| 192 | MLX5_IB_ATTR_PP_OBJ_ALLOC_FLAGS, |
| 193 | MLX5_IB_ATTR_PP_OBJ_ALLOC_INDEX, |
| 194 | }; |
| 195 | |
| 196 | enum mlx5_ib_pp_obj_destroy_attrs { |
| 197 | MLX5_IB_ATTR_PP_OBJ_DESTROY_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 198 | }; |
| 199 | |
| 200 | enum mlx5_ib_devx_umem_methods { |
| 201 | MLX5_IB_METHOD_DEVX_UMEM_REG = (1U << UVERBS_ID_NS_SHIFT), |
| 202 | MLX5_IB_METHOD_DEVX_UMEM_DEREG, |
| 203 | }; |
| 204 | |
| 205 | enum mlx5_ib_devx_async_cmd_fd_alloc_attrs { |
| 206 | MLX5_IB_ATTR_DEVX_ASYNC_CMD_FD_ALLOC_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 207 | }; |
| 208 | |
| 209 | enum mlx5_ib_devx_async_event_fd_alloc_attrs { |
| 210 | MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 211 | MLX5_IB_ATTR_DEVX_ASYNC_EVENT_FD_ALLOC_FLAGS, |
| 212 | }; |
| 213 | |
| 214 | enum mlx5_ib_devx_async_cmd_fd_methods { |
| 215 | MLX5_IB_METHOD_DEVX_ASYNC_CMD_FD_ALLOC = (1U << UVERBS_ID_NS_SHIFT), |
| 216 | }; |
| 217 | |
| 218 | enum mlx5_ib_devx_async_event_fd_methods { |
| 219 | MLX5_IB_METHOD_DEVX_ASYNC_EVENT_FD_ALLOC = (1U << UVERBS_ID_NS_SHIFT), |
| 220 | }; |
| 221 | |
| 222 | enum mlx5_ib_objects { |
| 223 | MLX5_IB_OBJECT_DEVX = (1U << UVERBS_ID_NS_SHIFT), |
| 224 | MLX5_IB_OBJECT_DEVX_OBJ, |
| 225 | MLX5_IB_OBJECT_DEVX_UMEM, |
| 226 | MLX5_IB_OBJECT_FLOW_MATCHER, |
| 227 | MLX5_IB_OBJECT_DEVX_ASYNC_CMD_FD, |
| 228 | MLX5_IB_OBJECT_DEVX_ASYNC_EVENT_FD, |
| 229 | MLX5_IB_OBJECT_VAR, |
| 230 | MLX5_IB_OBJECT_PP, |
| 231 | MLX5_IB_OBJECT_UAR, |
| 232 | MLX5_IB_OBJECT_STEERING_ANCHOR, |
| 233 | }; |
| 234 | |
| 235 | enum mlx5_ib_flow_matcher_create_attrs { |
| 236 | MLX5_IB_ATTR_FLOW_MATCHER_CREATE_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 237 | MLX5_IB_ATTR_FLOW_MATCHER_MATCH_MASK, |
| 238 | MLX5_IB_ATTR_FLOW_MATCHER_FLOW_TYPE, |
| 239 | MLX5_IB_ATTR_FLOW_MATCHER_MATCH_CRITERIA, |
| 240 | MLX5_IB_ATTR_FLOW_MATCHER_FLOW_FLAGS, |
| 241 | MLX5_IB_ATTR_FLOW_MATCHER_FT_TYPE, |
| 242 | MLX5_IB_ATTR_FLOW_MATCHER_IB_PORT, |
| 243 | }; |
| 244 | |
| 245 | enum mlx5_ib_flow_matcher_destroy_attrs { |
| 246 | MLX5_IB_ATTR_FLOW_MATCHER_DESTROY_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 247 | }; |
| 248 | |
| 249 | enum mlx5_ib_flow_matcher_methods { |
| 250 | MLX5_IB_METHOD_FLOW_MATCHER_CREATE = (1U << UVERBS_ID_NS_SHIFT), |
| 251 | MLX5_IB_METHOD_FLOW_MATCHER_DESTROY, |
| 252 | }; |
| 253 | |
| 254 | enum mlx5_ib_flow_steering_anchor_create_attrs { |
| 255 | MLX5_IB_ATTR_STEERING_ANCHOR_CREATE_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 256 | MLX5_IB_ATTR_STEERING_ANCHOR_FT_TYPE, |
| 257 | MLX5_IB_ATTR_STEERING_ANCHOR_PRIORITY, |
| 258 | MLX5_IB_ATTR_STEERING_ANCHOR_FT_ID, |
| 259 | }; |
| 260 | |
| 261 | enum mlx5_ib_flow_steering_anchor_destroy_attrs { |
| 262 | MLX5_IB_ATTR_STEERING_ANCHOR_DESTROY_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 263 | }; |
| 264 | |
| 265 | enum mlx5_ib_steering_anchor_methods { |
| 266 | MLX5_IB_METHOD_STEERING_ANCHOR_CREATE = (1U << UVERBS_ID_NS_SHIFT), |
| 267 | MLX5_IB_METHOD_STEERING_ANCHOR_DESTROY, |
| 268 | }; |
| 269 | |
| 270 | enum mlx5_ib_device_query_context_attrs { |
| 271 | MLX5_IB_ATTR_QUERY_CONTEXT_RESP_UCTX = (1U << UVERBS_ID_NS_SHIFT), |
| 272 | }; |
| 273 | |
| 274 | enum mlx5_ib_create_cq_attrs { |
| 275 | MLX5_IB_ATTR_CREATE_CQ_UAR_INDEX = UVERBS_ID_DRIVER_NS_WITH_UHW, |
| 276 | }; |
| 277 | |
| 278 | enum mlx5_ib_reg_dmabuf_mr_attrs { |
| 279 | MLX5_IB_ATTR_REG_DMABUF_MR_ACCESS_FLAGS = (1U << UVERBS_ID_NS_SHIFT), |
| 280 | }; |
| 281 | |
| 282 | #define MLX5_IB_DW_MATCH_PARAM 0xA0 |
| 283 | |
| 284 | struct mlx5_ib_match_params { |
| 285 | __u32 match_params[MLX5_IB_DW_MATCH_PARAM]; |
| 286 | }; |
| 287 | |
| 288 | enum mlx5_ib_flow_type { |
| 289 | MLX5_IB_FLOW_TYPE_NORMAL, |
| 290 | MLX5_IB_FLOW_TYPE_SNIFFER, |
| 291 | MLX5_IB_FLOW_TYPE_ALL_DEFAULT, |
| 292 | MLX5_IB_FLOW_TYPE_MC_DEFAULT, |
| 293 | }; |
| 294 | |
| 295 | enum mlx5_ib_create_flow_flags { |
| 296 | MLX5_IB_ATTR_CREATE_FLOW_FLAGS_DEFAULT_MISS = 1 << 0, |
| 297 | MLX5_IB_ATTR_CREATE_FLOW_FLAGS_DROP = 1 << 1, |
| 298 | }; |
| 299 | |
| 300 | enum mlx5_ib_create_flow_attrs { |
| 301 | MLX5_IB_ATTR_CREATE_FLOW_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 302 | MLX5_IB_ATTR_CREATE_FLOW_MATCH_VALUE, |
| 303 | MLX5_IB_ATTR_CREATE_FLOW_DEST_QP, |
| 304 | MLX5_IB_ATTR_CREATE_FLOW_DEST_DEVX, |
| 305 | MLX5_IB_ATTR_CREATE_FLOW_MATCHER, |
| 306 | MLX5_IB_ATTR_CREATE_FLOW_ARR_FLOW_ACTIONS, |
| 307 | MLX5_IB_ATTR_CREATE_FLOW_TAG, |
| 308 | MLX5_IB_ATTR_CREATE_FLOW_ARR_COUNTERS_DEVX, |
| 309 | MLX5_IB_ATTR_CREATE_FLOW_ARR_COUNTERS_DEVX_OFFSET, |
| 310 | MLX5_IB_ATTR_CREATE_FLOW_FLAGS, |
| 311 | }; |
| 312 | |
| 313 | enum mlx5_ib_destroy_flow_attrs { |
| 314 | MLX5_IB_ATTR_DESTROY_FLOW_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 315 | }; |
| 316 | |
| 317 | enum mlx5_ib_flow_methods { |
| 318 | MLX5_IB_METHOD_CREATE_FLOW = (1U << UVERBS_ID_NS_SHIFT), |
| 319 | MLX5_IB_METHOD_DESTROY_FLOW, |
| 320 | }; |
| 321 | |
| 322 | enum mlx5_ib_flow_action_methods { |
| 323 | = (1U << UVERBS_ID_NS_SHIFT), |
| 324 | MLX5_IB_METHOD_FLOW_ACTION_CREATE_PACKET_REFORMAT, |
| 325 | }; |
| 326 | |
| 327 | enum { |
| 328 | MLX5_IB_ATTR_CREATE_MODIFY_HEADER_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 329 | , |
| 330 | , |
| 331 | }; |
| 332 | |
| 333 | enum mlx5_ib_create_flow_action_create_packet_reformat_attrs { |
| 334 | MLX5_IB_ATTR_CREATE_PACKET_REFORMAT_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 335 | MLX5_IB_ATTR_CREATE_PACKET_REFORMAT_TYPE, |
| 336 | MLX5_IB_ATTR_CREATE_PACKET_REFORMAT_FT_TYPE, |
| 337 | MLX5_IB_ATTR_CREATE_PACKET_REFORMAT_DATA_BUF, |
| 338 | }; |
| 339 | |
| 340 | enum mlx5_ib_query_pd_attrs { |
| 341 | MLX5_IB_ATTR_QUERY_PD_HANDLE = (1U << UVERBS_ID_NS_SHIFT), |
| 342 | MLX5_IB_ATTR_QUERY_PD_RESP_PDN, |
| 343 | }; |
| 344 | |
| 345 | enum mlx5_ib_pd_methods { |
| 346 | MLX5_IB_METHOD_PD_QUERY = (1U << UVERBS_ID_NS_SHIFT), |
| 347 | |
| 348 | }; |
| 349 | |
| 350 | enum mlx5_ib_device_methods { |
| 351 | MLX5_IB_METHOD_QUERY_PORT = (1U << UVERBS_ID_NS_SHIFT), |
| 352 | MLX5_IB_METHOD_GET_DATA_DIRECT_SYSFS_PATH, |
| 353 | }; |
| 354 | |
| 355 | enum mlx5_ib_query_port_attrs { |
| 356 | MLX5_IB_ATTR_QUERY_PORT_PORT_NUM = (1U << UVERBS_ID_NS_SHIFT), |
| 357 | MLX5_IB_ATTR_QUERY_PORT, |
| 358 | }; |
| 359 | |
| 360 | enum mlx5_ib_get_data_direct_sysfs_path_attrs { |
| 361 | MLX5_IB_ATTR_GET_DATA_DIRECT_SYSFS_PATH = (1U << UVERBS_ID_NS_SHIFT), |
| 362 | }; |
| 363 | |
| 364 | #endif |
| 365 | |