| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef LINUX_SSB_MIPSCORE_H_ |
| 3 | #define LINUX_SSB_MIPSCORE_H_ |
| 4 | |
| 5 | #ifdef CONFIG_SSB_DRIVER_MIPS |
| 6 | |
| 7 | struct ssb_device; |
| 8 | |
| 9 | struct ssb_serial_port { |
| 10 | void *regs; |
| 11 | unsigned long clockspeed; |
| 12 | unsigned int irq; |
| 13 | unsigned int baud_base; |
| 14 | unsigned int reg_shift; |
| 15 | }; |
| 16 | |
| 17 | struct ssb_pflash { |
| 18 | bool present; |
| 19 | u8 buswidth; |
| 20 | u32 window; |
| 21 | u32 window_size; |
| 22 | }; |
| 23 | |
| 24 | #ifdef CONFIG_SSB_SFLASH |
| 25 | struct ssb_sflash { |
| 26 | bool present; |
| 27 | u32 window; |
| 28 | u32 blocksize; |
| 29 | u16 numblocks; |
| 30 | u32 size; |
| 31 | |
| 32 | void *priv; |
| 33 | }; |
| 34 | #endif |
| 35 | |
| 36 | struct ssb_mipscore { |
| 37 | struct ssb_device *dev; |
| 38 | |
| 39 | int nr_serial_ports; |
| 40 | struct ssb_serial_port serial_ports[4]; |
| 41 | |
| 42 | struct ssb_pflash pflash; |
| 43 | #ifdef CONFIG_SSB_SFLASH |
| 44 | struct ssb_sflash sflash; |
| 45 | #endif |
| 46 | }; |
| 47 | |
| 48 | extern void ssb_mipscore_init(struct ssb_mipscore *mcore); |
| 49 | extern u32 ssb_cpu_clock(struct ssb_mipscore *mcore); |
| 50 | |
| 51 | extern unsigned int ssb_mips_irq(struct ssb_device *dev); |
| 52 | |
| 53 | |
| 54 | #else /* CONFIG_SSB_DRIVER_MIPS */ |
| 55 | |
| 56 | struct ssb_mipscore { |
| 57 | }; |
| 58 | |
| 59 | static inline |
| 60 | void ssb_mipscore_init(struct ssb_mipscore *mcore) |
| 61 | { |
| 62 | } |
| 63 | |
| 64 | static inline unsigned int ssb_mips_irq(struct ssb_device *dev) |
| 65 | { |
| 66 | return 0; |
| 67 | } |
| 68 | |
| 69 | #endif /* CONFIG_SSB_DRIVER_MIPS */ |
| 70 | |
| 71 | #endif /* LINUX_SSB_MIPSCORE_H_ */ |
| 72 | |