| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
|---|
| 2 | /* |
|---|
| 3 | * Information for the Marvell Armada MMP camera |
|---|
| 4 | */ |
|---|
| 5 | |
|---|
| 6 | #include <media/v4l2-mediabus.h> |
|---|
| 7 | |
|---|
| 8 | enum dphy3_algo { |
|---|
| 9 | DPHY3_ALGO_DEFAULT = 0, |
|---|
| 10 | DPHY3_ALGO_PXA910, |
|---|
| 11 | DPHY3_ALGO_PXA2128 |
|---|
| 12 | }; |
|---|
| 13 | |
|---|
| 14 | struct mmp_camera_platform_data { |
|---|
| 15 | enum v4l2_mbus_type bus_type; |
|---|
| 16 | int mclk_src; /* which clock source the MCLK derives from */ |
|---|
| 17 | int mclk_div; /* Clock Divider Value for MCLK */ |
|---|
| 18 | /* |
|---|
| 19 | * MIPI support |
|---|
| 20 | */ |
|---|
| 21 | int dphy[3]; /* DPHY: CSI2_DPHY3, CSI2_DPHY5, CSI2_DPHY6 */ |
|---|
| 22 | enum dphy3_algo dphy3_algo; /* algos for calculate CSI2_DPHY3 */ |
|---|
| 23 | int lane; /* ccic used lane number; 0 means DVP mode */ |
|---|
| 24 | int lane_clk; |
|---|
| 25 | }; |
|---|
| 26 | |
|---|
