| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * UP Board CPLD/FPGA driver |
| 4 | * |
| 5 | * Copyright (c) AAEON. All rights reserved. |
| 6 | * Copyright (C) 2024 Bootlin |
| 7 | * |
| 8 | * Author: Gary Wang <garywang@aaeon.com.tw> |
| 9 | * Author: Thomas Richard <thomas.richard@bootlin.com> |
| 10 | * |
| 11 | */ |
| 12 | |
| 13 | #ifndef __LINUX_MFD_UPBOARD_FPGA_H |
| 14 | #define __LINUX_MFD_UPBOARD_FPGA_H |
| 15 | |
| 16 | #define UPBOARD_REGISTER_SIZE 16 |
| 17 | |
| 18 | enum upboard_fpgareg { |
| 19 | UPBOARD_REG_PLATFORM_ID = 0x10, |
| 20 | UPBOARD_REG_FIRMWARE_ID = 0x11, |
| 21 | UPBOARD_REG_FUNC_EN0 = 0x20, |
| 22 | UPBOARD_REG_FUNC_EN1 = 0x21, |
| 23 | UPBOARD_REG_GPIO_EN0 = 0x30, |
| 24 | UPBOARD_REG_GPIO_EN1 = 0x31, |
| 25 | UPBOARD_REG_GPIO_EN2 = 0x32, |
| 26 | UPBOARD_REG_GPIO_DIR0 = 0x40, |
| 27 | UPBOARD_REG_GPIO_DIR1 = 0x41, |
| 28 | UPBOARD_REG_GPIO_DIR2 = 0x42, |
| 29 | UPBOARD_REG_MAX, |
| 30 | }; |
| 31 | |
| 32 | enum upboard_fpga_type { |
| 33 | UPBOARD_UP_FPGA, |
| 34 | UPBOARD_UP2_FPGA, |
| 35 | }; |
| 36 | |
| 37 | struct upboard_fpga_data { |
| 38 | enum upboard_fpga_type type; |
| 39 | const struct regmap_config *regmap_config; |
| 40 | }; |
| 41 | |
| 42 | struct upboard_fpga { |
| 43 | struct device *dev; |
| 44 | struct regmap *regmap; |
| 45 | struct gpio_desc *enable_gpio; |
| 46 | struct gpio_desc *reset_gpio; |
| 47 | struct gpio_desc *clear_gpio; |
| 48 | struct gpio_desc *strobe_gpio; |
| 49 | struct gpio_desc *datain_gpio; |
| 50 | struct gpio_desc *dataout_gpio; |
| 51 | unsigned int firmware_version; |
| 52 | const struct upboard_fpga_data *fpga_data; |
| 53 | }; |
| 54 | |
| 55 | #endif /* __LINUX_MFD_UPBOARD_FPGA_H */ |
| 56 | |