| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * CS42L43 core driver external data |
| 4 | * |
| 5 | * Copyright (C) 2022-2023 Cirrus Logic, Inc. and |
| 6 | * Cirrus Logic International Semiconductor Ltd. |
| 7 | */ |
| 8 | |
| 9 | #ifndef CS42L43_CORE_EXT_H |
| 10 | #define CS42L43_CORE_EXT_H |
| 11 | |
| 12 | #include <linux/completion.h> |
| 13 | #include <linux/mutex.h> |
| 14 | #include <linux/regmap.h> |
| 15 | #include <linux/regulator/consumer.h> |
| 16 | #include <linux/workqueue.h> |
| 17 | |
| 18 | #define CS42L43_N_SUPPLIES 3 |
| 19 | |
| 20 | struct device; |
| 21 | struct gpio_desc; |
| 22 | struct sdw_slave; |
| 23 | |
| 24 | enum cs42l43_irq_numbers { |
| 25 | CS42L43_PLL_LOST_LOCK, |
| 26 | CS42L43_PLL_READY, |
| 27 | |
| 28 | CS42L43_HP_STARTUP_DONE, |
| 29 | CS42L43_HP_SHUTDOWN_DONE, |
| 30 | CS42L43_HSDET_DONE, |
| 31 | CS42L43_TIPSENSE_UNPLUG_DB, |
| 32 | CS42L43_TIPSENSE_PLUG_DB, |
| 33 | CS42L43_RINGSENSE_UNPLUG_DB, |
| 34 | CS42L43_RINGSENSE_PLUG_DB, |
| 35 | CS42L43_TIPSENSE_UNPLUG_PDET, |
| 36 | CS42L43_TIPSENSE_PLUG_PDET, |
| 37 | CS42L43_RINGSENSE_UNPLUG_PDET, |
| 38 | CS42L43_RINGSENSE_PLUG_PDET, |
| 39 | |
| 40 | CS42L43_HS2_BIAS_SENSE, |
| 41 | CS42L43_HS1_BIAS_SENSE, |
| 42 | CS42L43_DC_DETECT1_FALSE, |
| 43 | CS42L43_DC_DETECT1_TRUE, |
| 44 | CS42L43_HSBIAS_CLAMPED, |
| 45 | CS42L43_HS3_4_BIAS_SENSE, |
| 46 | |
| 47 | CS42L43_AMP2_CLK_STOP_FAULT, |
| 48 | CS42L43_AMP1_CLK_STOP_FAULT, |
| 49 | CS42L43_AMP2_VDDSPK_FAULT, |
| 50 | CS42L43_AMP1_VDDSPK_FAULT, |
| 51 | CS42L43_AMP2_SHUTDOWN_DONE, |
| 52 | CS42L43_AMP1_SHUTDOWN_DONE, |
| 53 | CS42L43_AMP2_STARTUP_DONE, |
| 54 | CS42L43_AMP1_STARTUP_DONE, |
| 55 | CS42L43_AMP2_THERM_SHDN, |
| 56 | CS42L43_AMP1_THERM_SHDN, |
| 57 | CS42L43_AMP2_THERM_WARN, |
| 58 | CS42L43_AMP1_THERM_WARN, |
| 59 | CS42L43_AMP2_SCDET, |
| 60 | CS42L43_AMP1_SCDET, |
| 61 | |
| 62 | CS42L43_GPIO3_FALL, |
| 63 | CS42L43_GPIO3_RISE, |
| 64 | CS42L43_GPIO2_FALL, |
| 65 | CS42L43_GPIO2_RISE, |
| 66 | CS42L43_GPIO1_FALL, |
| 67 | CS42L43_GPIO1_RISE, |
| 68 | |
| 69 | CS42L43_HP_ILIMIT, |
| 70 | CS42L43_HP_LOADDET_DONE, |
| 71 | }; |
| 72 | |
| 73 | struct cs42l43 { |
| 74 | struct device *dev; |
| 75 | struct regmap *regmap; |
| 76 | struct sdw_slave *sdw; |
| 77 | |
| 78 | struct regulator *vdd_p; |
| 79 | struct regulator *vdd_d; |
| 80 | struct regulator_bulk_data core_supplies[CS42L43_N_SUPPLIES]; |
| 81 | |
| 82 | struct gpio_desc *reset; |
| 83 | |
| 84 | int irq; |
| 85 | struct regmap_irq_chip irq_chip; |
| 86 | struct regmap_irq_chip_data *irq_data; |
| 87 | |
| 88 | struct work_struct boot_work; |
| 89 | struct completion device_attach; |
| 90 | struct completion device_detach; |
| 91 | struct completion firmware_download; |
| 92 | int firmware_error; |
| 93 | |
| 94 | unsigned int sdw_freq; |
| 95 | /* Lock to gate control of the PLL and its sources. */ |
| 96 | struct mutex pll_lock; |
| 97 | |
| 98 | bool sdw_pll_active; |
| 99 | bool attached; |
| 100 | bool hw_lock; |
| 101 | }; |
| 102 | |
| 103 | #endif /* CS42L43_CORE_EXT_H */ |
| 104 | |