| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Copyright (C) 2014 Free Electrons |
| 4 | * Copyright (C) 2014 Atmel |
| 5 | * |
| 6 | * Author: Boris BREZILLON <boris.brezillon@free-electrons.com> |
| 7 | */ |
| 8 | |
| 9 | #ifndef __LINUX_MFD_HLCDC_H |
| 10 | #define __LINUX_MFD_HLCDC_H |
| 11 | |
| 12 | #include <linux/clk.h> |
| 13 | #include <linux/regmap.h> |
| 14 | |
| 15 | #define ATMEL_HLCDC_CFG(i) ((i) * 0x4) |
| 16 | #define ATMEL_HLCDC_SIG_CFG LCDCFG(5) |
| 17 | #define ATMEL_HLCDC_HSPOL BIT(0) |
| 18 | #define ATMEL_HLCDC_VSPOL BIT(1) |
| 19 | #define ATMEL_HLCDC_VSPDLYS BIT(2) |
| 20 | #define ATMEL_HLCDC_VSPDLYE BIT(3) |
| 21 | #define ATMEL_HLCDC_DISPPOL BIT(4) |
| 22 | #define ATMEL_HLCDC_DITHER BIT(6) |
| 23 | #define ATMEL_HLCDC_DISPDLY BIT(7) |
| 24 | #define ATMEL_HLCDC_MODE_MASK GENMASK(9, 8) |
| 25 | #define ATMEL_XLCDC_MODE_MASK GENMASK(10, 8) |
| 26 | #define ATMEL_XLCDC_DPI BIT(11) |
| 27 | #define ATMEL_HLCDC_PP BIT(10) |
| 28 | #define ATMEL_HLCDC_VSPSU BIT(12) |
| 29 | #define ATMEL_HLCDC_VSPHO BIT(13) |
| 30 | #define ATMEL_HLCDC_GUARDTIME_MASK GENMASK(20, 16) |
| 31 | |
| 32 | #define ATMEL_HLCDC_EN 0x20 |
| 33 | #define ATMEL_HLCDC_DIS 0x24 |
| 34 | #define ATMEL_HLCDC_SR 0x28 |
| 35 | #define ATMEL_HLCDC_IER 0x2c |
| 36 | #define ATMEL_HLCDC_IDR 0x30 |
| 37 | #define ATMEL_HLCDC_IMR 0x34 |
| 38 | #define ATMEL_HLCDC_ISR 0x38 |
| 39 | #define ATMEL_XLCDC_ATTRE 0x3c |
| 40 | |
| 41 | #define ATMEL_XLCDC_BASE_UPDATE BIT(0) |
| 42 | #define ATMEL_XLCDC_OVR1_UPDATE BIT(1) |
| 43 | #define ATMEL_XLCDC_OVR3_UPDATE BIT(2) |
| 44 | #define ATMEL_XLCDC_HEO_UPDATE BIT(3) |
| 45 | |
| 46 | #define ATMEL_HLCDC_CLKPOL BIT(0) |
| 47 | #define ATMEL_HLCDC_CLKSEL BIT(2) |
| 48 | #define ATMEL_HLCDC_CLKPWMSEL BIT(3) |
| 49 | #define ATMEL_HLCDC_CGDIS(i) BIT(8 + (i)) |
| 50 | #define ATMEL_HLCDC_CLKDIV_SHFT 16 |
| 51 | #define ATMEL_HLCDC_CLKDIV_MASK GENMASK(23, 16) |
| 52 | #define ATMEL_HLCDC_CLKDIV(div) ((div - 2) << ATMEL_HLCDC_CLKDIV_SHFT) |
| 53 | |
| 54 | #define ATMEL_HLCDC_PIXEL_CLK BIT(0) |
| 55 | #define ATMEL_HLCDC_SYNC BIT(1) |
| 56 | #define ATMEL_HLCDC_DISP BIT(2) |
| 57 | #define ATMEL_HLCDC_PWM BIT(3) |
| 58 | #define ATMEL_HLCDC_SIP BIT(4) |
| 59 | #define ATMEL_XLCDC_SD BIT(5) |
| 60 | #define ATMEL_XLCDC_CM BIT(6) |
| 61 | |
| 62 | #define ATMEL_HLCDC_SOF BIT(0) |
| 63 | #define ATMEL_HLCDC_SYNCDIS BIT(1) |
| 64 | #define ATMEL_HLCDC_FIFOERR BIT(4) |
| 65 | #define ATMEL_HLCDC_LAYER_STATUS(x) BIT((x) + 8) |
| 66 | |
| 67 | /** |
| 68 | * Structure shared by the MFD device and its subdevices. |
| 69 | * |
| 70 | * @regmap: register map used to access HLCDC IP registers |
| 71 | * @periph_clk: the hlcdc peripheral clock |
| 72 | * @sys_clk: the hlcdc system clock |
| 73 | * @slow_clk: the system slow clk |
| 74 | * @irq: the hlcdc irq |
| 75 | */ |
| 76 | struct atmel_hlcdc { |
| 77 | struct regmap *regmap; |
| 78 | struct clk *periph_clk; |
| 79 | struct clk *sys_clk; |
| 80 | struct clk *slow_clk; |
| 81 | int irq; |
| 82 | }; |
| 83 | |
| 84 | #endif /* __LINUX_MFD_HLCDC_H */ |
| 85 | |