| 1 | /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ |
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| 2 | /* Copyright 2019 NXP */ |
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| 3 | |
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| 4 | #ifndef _FSL_ENETC_MDIO_H_ |
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| 5 | #define _FSL_ENETC_MDIO_H_ |
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| 6 | |
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| 7 | #include <linux/phy.h> |
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| 8 | |
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| 9 | /* PCS registers */ |
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| 10 | #define ENETC_PCS_LINK_TIMER1 0x12 |
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| 11 | #define ENETC_PCS_LINK_TIMER1_VAL 0x06a0 |
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| 12 | #define ENETC_PCS_LINK_TIMER2 0x13 |
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| 13 | #define ENETC_PCS_LINK_TIMER2_VAL 0x0003 |
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| 14 | #define ENETC_PCS_IF_MODE 0x14 |
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| 15 | #define ENETC_PCS_IF_MODE_SGMII_EN BIT(0) |
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| 16 | #define ENETC_PCS_IF_MODE_USE_SGMII_AN BIT(1) |
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| 17 | #define ENETC_PCS_IF_MODE_SGMII_SPEED(x) (((x) << 2) & GENMASK(3, 2)) |
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| 18 | #define ENETC_PCS_IF_MODE_DUPLEX_HALF BIT(3) |
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| 19 | |
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| 20 | /* Not a mistake, the SerDes PLL needs to be set at 3.125 GHz by Reset |
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| 21 | * Configuration Word (RCW, outside Linux control) for 2.5G SGMII mode. The PCS |
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| 22 | * still thinks it's at gigabit. |
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| 23 | */ |
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| 24 | enum enetc_pcs_speed { |
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| 25 | ENETC_PCS_SPEED_10 = 0, |
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| 26 | ENETC_PCS_SPEED_100 = 1, |
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| 27 | ENETC_PCS_SPEED_1000 = 2, |
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| 28 | ENETC_PCS_SPEED_2500 = 2, |
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| 29 | }; |
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| 30 | |
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| 31 | struct enetc_hw; |
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| 32 | |
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| 33 | struct enetc_mdio_priv { |
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| 34 | struct enetc_hw *hw; |
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| 35 | int mdio_base; |
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| 36 | }; |
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| 37 | |
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| 38 | #if IS_REACHABLE(CONFIG_FSL_ENETC_MDIO) |
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| 39 | |
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| 40 | int enetc_mdio_read_c22(struct mii_bus *bus, int phy_id, int regnum); |
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| 41 | int enetc_mdio_write_c22(struct mii_bus *bus, int phy_id, int regnum, |
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| 42 | u16 value); |
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| 43 | int enetc_mdio_read_c45(struct mii_bus *bus, int phy_id, int devad, int regnum); |
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| 44 | int enetc_mdio_write_c45(struct mii_bus *bus, int phy_id, int devad, int regnum, |
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| 45 | u16 value); |
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| 46 | struct enetc_hw *enetc_hw_alloc(struct device *dev, void __iomem *port_regs); |
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| 47 | |
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| 48 | #else |
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| 49 | |
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| 50 | static inline int enetc_mdio_read_c22(struct mii_bus *bus, int phy_id, |
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| 51 | int regnum) |
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| 52 | { return -EINVAL; } |
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| 53 | static inline int enetc_mdio_write_c22(struct mii_bus *bus, int phy_id, |
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| 54 | int regnum, u16 value) |
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| 55 | { return -EINVAL; } |
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| 56 | static inline int enetc_mdio_read_c45(struct mii_bus *bus, int phy_id, |
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| 57 | int devad, int regnum) |
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| 58 | { return -EINVAL; } |
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| 59 | static inline int enetc_mdio_write_c45(struct mii_bus *bus, int phy_id, |
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| 60 | int devad, int regnum, u16 value) |
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| 61 | { return -EINVAL; } |
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| 62 | static inline struct enetc_hw *enetc_hw_alloc(struct device *dev, |
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| 63 | void __iomem *port_regs) |
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| 64 | { return ERR_PTR(-EINVAL); } |
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| 65 | |
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| 66 | #endif |
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| 67 | |
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| 68 | #endif |
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| 69 | |
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