| 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * ISM driver for s390. |
| 4 | * |
| 5 | * Copyright IBM Corp. 2018 |
| 6 | */ |
| 7 | #define pr_fmt(fmt) "ism: " fmt |
| 8 | |
| 9 | #include <linux/export.h> |
| 10 | #include <linux/module.h> |
| 11 | #include <linux/types.h> |
| 12 | #include <linux/interrupt.h> |
| 13 | #include <linux/device.h> |
| 14 | #include <linux/err.h> |
| 15 | #include <linux/ctype.h> |
| 16 | #include <linux/processor.h> |
| 17 | |
| 18 | #include "ism.h" |
| 19 | |
| 20 | MODULE_DESCRIPTION("ISM driver for s390" ); |
| 21 | MODULE_LICENSE("GPL" ); |
| 22 | |
| 23 | #define DRV_NAME "ism" |
| 24 | |
| 25 | static const struct pci_device_id ism_device_table[] = { |
| 26 | { PCI_VDEVICE(IBM, PCI_DEVICE_ID_IBM_ISM), 0 }, |
| 27 | { 0, } |
| 28 | }; |
| 29 | MODULE_DEVICE_TABLE(pci, ism_device_table); |
| 30 | |
| 31 | static debug_info_t *ism_debug_info; |
| 32 | |
| 33 | static int ism_cmd(struct ism_dev *ism, void *cmd) |
| 34 | { |
| 35 | struct ism_req_hdr *req = cmd; |
| 36 | struct ism_resp_hdr *resp = cmd; |
| 37 | |
| 38 | spin_lock(lock: &ism->cmd_lock); |
| 39 | __ism_write_cmd(ism, data: req + 1, offset: sizeof(*req), len: req->len - sizeof(*req)); |
| 40 | __ism_write_cmd(ism, data: req, offset: 0, len: sizeof(*req)); |
| 41 | |
| 42 | WRITE_ONCE(resp->ret, ISM_ERROR); |
| 43 | |
| 44 | __ism_read_cmd(ism, data: resp, offset: 0, len: sizeof(*resp)); |
| 45 | if (resp->ret) { |
| 46 | debug_text_event(ism_debug_info, 0, "cmd failure" ); |
| 47 | debug_event(ism_debug_info, 0, resp, sizeof(*resp)); |
| 48 | goto out; |
| 49 | } |
| 50 | __ism_read_cmd(ism, data: resp + 1, offset: sizeof(*resp), len: resp->len - sizeof(*resp)); |
| 51 | out: |
| 52 | spin_unlock(lock: &ism->cmd_lock); |
| 53 | return resp->ret; |
| 54 | } |
| 55 | |
| 56 | static int ism_cmd_simple(struct ism_dev *ism, u32 cmd_code) |
| 57 | { |
| 58 | union ism_cmd_simple cmd; |
| 59 | |
| 60 | memset(&cmd, 0, sizeof(cmd)); |
| 61 | cmd.request.hdr.cmd = cmd_code; |
| 62 | cmd.request.hdr.len = sizeof(cmd.request); |
| 63 | |
| 64 | return ism_cmd(ism, cmd: &cmd); |
| 65 | } |
| 66 | |
| 67 | static int query_info(struct ism_dev *ism) |
| 68 | { |
| 69 | union ism_qi cmd; |
| 70 | |
| 71 | memset(&cmd, 0, sizeof(cmd)); |
| 72 | cmd.request.hdr.cmd = ISM_QUERY_INFO; |
| 73 | cmd.request.hdr.len = sizeof(cmd.request); |
| 74 | |
| 75 | if (ism_cmd(ism, cmd: &cmd)) |
| 76 | goto out; |
| 77 | |
| 78 | debug_text_event(ism_debug_info, 3, "query info" ); |
| 79 | debug_event(ism_debug_info, 3, &cmd.response, sizeof(cmd.response)); |
| 80 | out: |
| 81 | return 0; |
| 82 | } |
| 83 | |
| 84 | static int register_sba(struct ism_dev *ism) |
| 85 | { |
| 86 | union ism_reg_sba cmd; |
| 87 | dma_addr_t dma_handle; |
| 88 | struct ism_sba *sba; |
| 89 | |
| 90 | sba = dma_alloc_coherent(dev: &ism->pdev->dev, PAGE_SIZE, dma_handle: &dma_handle, |
| 91 | GFP_KERNEL); |
| 92 | if (!sba) |
| 93 | return -ENOMEM; |
| 94 | |
| 95 | memset(&cmd, 0, sizeof(cmd)); |
| 96 | cmd.request.hdr.cmd = ISM_REG_SBA; |
| 97 | cmd.request.hdr.len = sizeof(cmd.request); |
| 98 | cmd.request.sba = dma_handle; |
| 99 | |
| 100 | if (ism_cmd(ism, cmd: &cmd)) { |
| 101 | dma_free_coherent(dev: &ism->pdev->dev, PAGE_SIZE, cpu_addr: sba, dma_handle); |
| 102 | return -EIO; |
| 103 | } |
| 104 | |
| 105 | ism->sba = sba; |
| 106 | ism->sba_dma_addr = dma_handle; |
| 107 | |
| 108 | return 0; |
| 109 | } |
| 110 | |
| 111 | static int register_ieq(struct ism_dev *ism) |
| 112 | { |
| 113 | union ism_reg_ieq cmd; |
| 114 | dma_addr_t dma_handle; |
| 115 | struct ism_eq *ieq; |
| 116 | |
| 117 | ieq = dma_alloc_coherent(dev: &ism->pdev->dev, PAGE_SIZE, dma_handle: &dma_handle, |
| 118 | GFP_KERNEL); |
| 119 | if (!ieq) |
| 120 | return -ENOMEM; |
| 121 | |
| 122 | memset(&cmd, 0, sizeof(cmd)); |
| 123 | cmd.request.hdr.cmd = ISM_REG_IEQ; |
| 124 | cmd.request.hdr.len = sizeof(cmd.request); |
| 125 | cmd.request.ieq = dma_handle; |
| 126 | cmd.request.len = sizeof(*ieq); |
| 127 | |
| 128 | if (ism_cmd(ism, cmd: &cmd)) { |
| 129 | dma_free_coherent(dev: &ism->pdev->dev, PAGE_SIZE, cpu_addr: ieq, dma_handle); |
| 130 | return -EIO; |
| 131 | } |
| 132 | |
| 133 | ism->ieq = ieq; |
| 134 | ism->ieq_idx = -1; |
| 135 | ism->ieq_dma_addr = dma_handle; |
| 136 | |
| 137 | return 0; |
| 138 | } |
| 139 | |
| 140 | static int unregister_sba(struct ism_dev *ism) |
| 141 | { |
| 142 | int ret; |
| 143 | |
| 144 | if (!ism->sba) |
| 145 | return 0; |
| 146 | |
| 147 | ret = ism_cmd_simple(ism, ISM_UNREG_SBA); |
| 148 | if (ret && ret != ISM_ERROR) |
| 149 | return -EIO; |
| 150 | |
| 151 | dma_free_coherent(dev: &ism->pdev->dev, PAGE_SIZE, |
| 152 | cpu_addr: ism->sba, dma_handle: ism->sba_dma_addr); |
| 153 | |
| 154 | ism->sba = NULL; |
| 155 | ism->sba_dma_addr = 0; |
| 156 | |
| 157 | return 0; |
| 158 | } |
| 159 | |
| 160 | static int unregister_ieq(struct ism_dev *ism) |
| 161 | { |
| 162 | int ret; |
| 163 | |
| 164 | if (!ism->ieq) |
| 165 | return 0; |
| 166 | |
| 167 | ret = ism_cmd_simple(ism, ISM_UNREG_IEQ); |
| 168 | if (ret && ret != ISM_ERROR) |
| 169 | return -EIO; |
| 170 | |
| 171 | dma_free_coherent(dev: &ism->pdev->dev, PAGE_SIZE, |
| 172 | cpu_addr: ism->ieq, dma_handle: ism->ieq_dma_addr); |
| 173 | |
| 174 | ism->ieq = NULL; |
| 175 | ism->ieq_dma_addr = 0; |
| 176 | |
| 177 | return 0; |
| 178 | } |
| 179 | |
| 180 | static int ism_read_local_gid(struct dibs_dev *dibs) |
| 181 | { |
| 182 | struct ism_dev *ism = dibs->drv_priv; |
| 183 | union ism_read_gid cmd; |
| 184 | int ret; |
| 185 | |
| 186 | memset(&cmd, 0, sizeof(cmd)); |
| 187 | cmd.request.hdr.cmd = ISM_READ_GID; |
| 188 | cmd.request.hdr.len = sizeof(cmd.request); |
| 189 | |
| 190 | ret = ism_cmd(ism, cmd: &cmd); |
| 191 | if (ret) |
| 192 | goto out; |
| 193 | |
| 194 | memset(&dibs->gid, 0, sizeof(dibs->gid)); |
| 195 | memcpy(&dibs->gid, &cmd.response.gid, sizeof(cmd.response.gid)); |
| 196 | out: |
| 197 | return ret; |
| 198 | } |
| 199 | |
| 200 | static int ism_query_rgid(struct dibs_dev *dibs, const uuid_t *rgid, |
| 201 | u32 vid_valid, u32 vid) |
| 202 | { |
| 203 | struct ism_dev *ism = dibs->drv_priv; |
| 204 | union ism_query_rgid cmd; |
| 205 | |
| 206 | memset(&cmd, 0, sizeof(cmd)); |
| 207 | cmd.request.hdr.cmd = ISM_QUERY_RGID; |
| 208 | cmd.request.hdr.len = sizeof(cmd.request); |
| 209 | |
| 210 | memcpy(&cmd.request.rgid, rgid, sizeof(cmd.request.rgid)); |
| 211 | cmd.request.vlan_valid = vid_valid; |
| 212 | cmd.request.vlan_id = vid; |
| 213 | |
| 214 | return ism_cmd(ism, cmd: &cmd); |
| 215 | } |
| 216 | |
| 217 | static int ism_max_dmbs(void) |
| 218 | { |
| 219 | return ISM_NR_DMBS; |
| 220 | } |
| 221 | |
| 222 | static void ism_free_dmb(struct ism_dev *ism, struct dibs_dmb *dmb) |
| 223 | { |
| 224 | clear_bit(nr: dmb->idx, addr: ism->sba_bitmap); |
| 225 | dma_unmap_page(&ism->pdev->dev, dmb->dma_addr, dmb->dmb_len, |
| 226 | DMA_FROM_DEVICE); |
| 227 | folio_put(folio: virt_to_folio(x: dmb->cpu_addr)); |
| 228 | } |
| 229 | |
| 230 | static int ism_alloc_dmb(struct ism_dev *ism, struct dibs_dmb *dmb) |
| 231 | { |
| 232 | struct folio *folio; |
| 233 | unsigned long bit; |
| 234 | int rc; |
| 235 | |
| 236 | if (PAGE_ALIGN(dmb->dmb_len) > dma_get_max_seg_size(dev: &ism->pdev->dev)) |
| 237 | return -EINVAL; |
| 238 | |
| 239 | if (!dmb->idx) { |
| 240 | bit = find_next_zero_bit(addr: ism->sba_bitmap, ISM_NR_DMBS, |
| 241 | ISM_DMB_BIT_OFFSET); |
| 242 | if (bit == ISM_NR_DMBS) |
| 243 | return -ENOSPC; |
| 244 | |
| 245 | dmb->idx = bit; |
| 246 | } |
| 247 | if (dmb->idx < ISM_DMB_BIT_OFFSET || |
| 248 | test_and_set_bit(nr: dmb->idx, addr: ism->sba_bitmap)) |
| 249 | return -EINVAL; |
| 250 | |
| 251 | folio = folio_alloc(GFP_KERNEL | __GFP_NOWARN | __GFP_NOMEMALLOC | |
| 252 | __GFP_NORETRY, get_order(dmb->dmb_len)); |
| 253 | |
| 254 | if (!folio) { |
| 255 | rc = -ENOMEM; |
| 256 | goto out_bit; |
| 257 | } |
| 258 | |
| 259 | dmb->cpu_addr = folio_address(folio); |
| 260 | dmb->dma_addr = dma_map_page(&ism->pdev->dev, |
| 261 | virt_to_page(dmb->cpu_addr), 0, |
| 262 | dmb->dmb_len, DMA_FROM_DEVICE); |
| 263 | if (dma_mapping_error(dev: &ism->pdev->dev, dma_addr: dmb->dma_addr)) { |
| 264 | rc = -ENOMEM; |
| 265 | goto out_free; |
| 266 | } |
| 267 | |
| 268 | return 0; |
| 269 | |
| 270 | out_free: |
| 271 | kfree(objp: dmb->cpu_addr); |
| 272 | out_bit: |
| 273 | clear_bit(nr: dmb->idx, addr: ism->sba_bitmap); |
| 274 | return rc; |
| 275 | } |
| 276 | |
| 277 | static int ism_register_dmb(struct dibs_dev *dibs, struct dibs_dmb *dmb, |
| 278 | struct dibs_client *client) |
| 279 | { |
| 280 | struct ism_dev *ism = dibs->drv_priv; |
| 281 | union ism_reg_dmb cmd; |
| 282 | unsigned long flags; |
| 283 | int ret; |
| 284 | |
| 285 | ret = ism_alloc_dmb(ism, dmb); |
| 286 | if (ret) |
| 287 | goto out; |
| 288 | |
| 289 | memset(&cmd, 0, sizeof(cmd)); |
| 290 | cmd.request.hdr.cmd = ISM_REG_DMB; |
| 291 | cmd.request.hdr.len = sizeof(cmd.request); |
| 292 | |
| 293 | cmd.request.dmb = dmb->dma_addr; |
| 294 | cmd.request.dmb_len = dmb->dmb_len; |
| 295 | cmd.request.sba_idx = dmb->idx; |
| 296 | cmd.request.vlan_valid = dmb->vlan_valid; |
| 297 | cmd.request.vlan_id = dmb->vlan_id; |
| 298 | memcpy(&cmd.request.rgid, &dmb->rgid, sizeof(u64)); |
| 299 | |
| 300 | ret = ism_cmd(ism, cmd: &cmd); |
| 301 | if (ret) { |
| 302 | ism_free_dmb(ism, dmb); |
| 303 | goto out; |
| 304 | } |
| 305 | dmb->dmb_tok = cmd.response.dmb_tok; |
| 306 | spin_lock_irqsave(&dibs->lock, flags); |
| 307 | dibs->dmb_clientid_arr[dmb->idx - ISM_DMB_BIT_OFFSET] = client->id; |
| 308 | spin_unlock_irqrestore(lock: &dibs->lock, flags); |
| 309 | out: |
| 310 | return ret; |
| 311 | } |
| 312 | |
| 313 | static int ism_unregister_dmb(struct dibs_dev *dibs, struct dibs_dmb *dmb) |
| 314 | { |
| 315 | struct ism_dev *ism = dibs->drv_priv; |
| 316 | union ism_unreg_dmb cmd; |
| 317 | unsigned long flags; |
| 318 | int ret; |
| 319 | |
| 320 | memset(&cmd, 0, sizeof(cmd)); |
| 321 | cmd.request.hdr.cmd = ISM_UNREG_DMB; |
| 322 | cmd.request.hdr.len = sizeof(cmd.request); |
| 323 | |
| 324 | cmd.request.dmb_tok = dmb->dmb_tok; |
| 325 | |
| 326 | spin_lock_irqsave(&dibs->lock, flags); |
| 327 | dibs->dmb_clientid_arr[dmb->idx - ISM_DMB_BIT_OFFSET] = NO_DIBS_CLIENT; |
| 328 | spin_unlock_irqrestore(lock: &dibs->lock, flags); |
| 329 | |
| 330 | ret = ism_cmd(ism, cmd: &cmd); |
| 331 | if (ret && ret != ISM_ERROR) |
| 332 | goto out; |
| 333 | |
| 334 | ism_free_dmb(ism, dmb); |
| 335 | out: |
| 336 | return ret; |
| 337 | } |
| 338 | |
| 339 | static int ism_add_vlan_id(struct dibs_dev *dibs, u64 vlan_id) |
| 340 | { |
| 341 | struct ism_dev *ism = dibs->drv_priv; |
| 342 | union ism_set_vlan_id cmd; |
| 343 | |
| 344 | memset(&cmd, 0, sizeof(cmd)); |
| 345 | cmd.request.hdr.cmd = ISM_ADD_VLAN_ID; |
| 346 | cmd.request.hdr.len = sizeof(cmd.request); |
| 347 | |
| 348 | cmd.request.vlan_id = vlan_id; |
| 349 | |
| 350 | return ism_cmd(ism, cmd: &cmd); |
| 351 | } |
| 352 | |
| 353 | static int ism_del_vlan_id(struct dibs_dev *dibs, u64 vlan_id) |
| 354 | { |
| 355 | struct ism_dev *ism = dibs->drv_priv; |
| 356 | union ism_set_vlan_id cmd; |
| 357 | |
| 358 | memset(&cmd, 0, sizeof(cmd)); |
| 359 | cmd.request.hdr.cmd = ISM_DEL_VLAN_ID; |
| 360 | cmd.request.hdr.len = sizeof(cmd.request); |
| 361 | |
| 362 | cmd.request.vlan_id = vlan_id; |
| 363 | |
| 364 | return ism_cmd(ism, cmd: &cmd); |
| 365 | } |
| 366 | |
| 367 | static int ism_signal_ieq(struct dibs_dev *dibs, const uuid_t *rgid, |
| 368 | u32 trigger_irq, u32 event_code, u64 info) |
| 369 | { |
| 370 | struct ism_dev *ism = dibs->drv_priv; |
| 371 | union ism_sig_ieq cmd; |
| 372 | |
| 373 | memset(&cmd, 0, sizeof(cmd)); |
| 374 | cmd.request.hdr.cmd = ISM_SIGNAL_IEQ; |
| 375 | cmd.request.hdr.len = sizeof(cmd.request); |
| 376 | |
| 377 | memcpy(&cmd.request.rgid, rgid, sizeof(cmd.request.rgid)); |
| 378 | cmd.request.trigger_irq = trigger_irq; |
| 379 | cmd.request.event_code = event_code; |
| 380 | cmd.request.info = info; |
| 381 | |
| 382 | return ism_cmd(ism, cmd: &cmd); |
| 383 | } |
| 384 | |
| 385 | static unsigned int max_bytes(unsigned int start, unsigned int len, |
| 386 | unsigned int boundary) |
| 387 | { |
| 388 | return min(boundary - (start & (boundary - 1)), len); |
| 389 | } |
| 390 | |
| 391 | static int ism_move(struct dibs_dev *dibs, u64 dmb_tok, unsigned int idx, |
| 392 | bool sf, unsigned int offset, void *data, |
| 393 | unsigned int size) |
| 394 | { |
| 395 | struct ism_dev *ism = dibs->drv_priv; |
| 396 | unsigned int bytes; |
| 397 | u64 dmb_req; |
| 398 | int ret; |
| 399 | |
| 400 | while (size) { |
| 401 | bytes = max_bytes(start: offset, len: size, PAGE_SIZE); |
| 402 | dmb_req = ISM_CREATE_REQ(dmb_tok, idx, size == bytes ? sf : 0, |
| 403 | offset); |
| 404 | |
| 405 | ret = __ism_move(ism, dmb_req, data, size: bytes); |
| 406 | if (ret) |
| 407 | return ret; |
| 408 | |
| 409 | size -= bytes; |
| 410 | data += bytes; |
| 411 | offset += bytes; |
| 412 | } |
| 413 | |
| 414 | return 0; |
| 415 | } |
| 416 | |
| 417 | static u16 ism_get_chid(struct dibs_dev *dibs) |
| 418 | { |
| 419 | struct ism_dev *ism = dibs->drv_priv; |
| 420 | |
| 421 | if (!ism || !ism->pdev) |
| 422 | return 0; |
| 423 | |
| 424 | return to_zpci(ism->pdev)->pchid; |
| 425 | } |
| 426 | |
| 427 | static int ism_match_event_type(u32 s390_event_type) |
| 428 | { |
| 429 | switch (s390_event_type) { |
| 430 | case ISM_EVENT_BUF: |
| 431 | return DIBS_BUF_EVENT; |
| 432 | case ISM_EVENT_DEV: |
| 433 | return DIBS_DEV_EVENT; |
| 434 | case ISM_EVENT_SWR: |
| 435 | return DIBS_SW_EVENT; |
| 436 | default: |
| 437 | return DIBS_OTHER_TYPE; |
| 438 | } |
| 439 | } |
| 440 | |
| 441 | static int ism_match_event_subtype(u32 s390_event_subtype) |
| 442 | { |
| 443 | switch (s390_event_subtype) { |
| 444 | case ISM_BUF_DMB_UNREGISTERED: |
| 445 | return DIBS_BUF_UNREGISTERED; |
| 446 | case ISM_DEV_GID_DISABLED: |
| 447 | return DIBS_DEV_DISABLED; |
| 448 | case ISM_DEV_GID_ERR_STATE: |
| 449 | return DIBS_DEV_ERR_STATE; |
| 450 | default: |
| 451 | return DIBS_OTHER_SUBTYPE; |
| 452 | } |
| 453 | } |
| 454 | |
| 455 | static void ism_handle_event(struct ism_dev *ism) |
| 456 | { |
| 457 | struct dibs_dev *dibs = ism->dibs; |
| 458 | struct dibs_event event; |
| 459 | struct ism_event *entry; |
| 460 | struct dibs_client *clt; |
| 461 | int i; |
| 462 | |
| 463 | while ((ism->ieq_idx + 1) != READ_ONCE(ism->ieq->header.idx)) { |
| 464 | if (++ism->ieq_idx == ARRAY_SIZE(ism->ieq->entry)) |
| 465 | ism->ieq_idx = 0; |
| 466 | |
| 467 | entry = &ism->ieq->entry[ism->ieq_idx]; |
| 468 | debug_event(ism_debug_info, 2, entry, sizeof(*entry)); |
| 469 | __memset(s: &event, c: 0, n: sizeof(event)); |
| 470 | event.type = ism_match_event_type(s390_event_type: entry->type); |
| 471 | if (event.type == DIBS_SW_EVENT) |
| 472 | event.subtype = entry->code; |
| 473 | else |
| 474 | event.subtype = ism_match_event_subtype(s390_event_subtype: entry->code); |
| 475 | event.time = entry->time; |
| 476 | event.data = entry->info; |
| 477 | switch (event.type) { |
| 478 | case DIBS_BUF_EVENT: |
| 479 | event.buffer_tok = entry->tok; |
| 480 | break; |
| 481 | case DIBS_DEV_EVENT: |
| 482 | case DIBS_SW_EVENT: |
| 483 | memcpy(&event.gid, &entry->tok, sizeof(u64)); |
| 484 | } |
| 485 | for (i = 0; i < MAX_DIBS_CLIENTS; ++i) { |
| 486 | clt = dibs->subs[i]; |
| 487 | if (clt) |
| 488 | clt->ops->handle_event(dibs, &event); |
| 489 | } |
| 490 | } |
| 491 | } |
| 492 | |
| 493 | static irqreturn_t ism_handle_irq(int irq, void *data) |
| 494 | { |
| 495 | struct ism_dev *ism = data; |
| 496 | unsigned long bit, end; |
| 497 | struct dibs_dev *dibs; |
| 498 | unsigned long *bv; |
| 499 | u16 dmbemask; |
| 500 | u8 client_id; |
| 501 | |
| 502 | dibs = ism->dibs; |
| 503 | |
| 504 | bv = (void *) &ism->sba->dmb_bits[ISM_DMB_WORD_OFFSET]; |
| 505 | end = sizeof(ism->sba->dmb_bits) * BITS_PER_BYTE - ISM_DMB_BIT_OFFSET; |
| 506 | |
| 507 | spin_lock(lock: &dibs->lock); |
| 508 | ism->sba->s = 0; |
| 509 | barrier(); |
| 510 | for (bit = 0;;) { |
| 511 | bit = find_next_bit_inv(bv, end, bit); |
| 512 | if (bit >= end) |
| 513 | break; |
| 514 | |
| 515 | clear_bit_inv(bit, bv); |
| 516 | dmbemask = ism->sba->dmbe_mask[bit + ISM_DMB_BIT_OFFSET]; |
| 517 | ism->sba->dmbe_mask[bit + ISM_DMB_BIT_OFFSET] = 0; |
| 518 | barrier(); |
| 519 | client_id = dibs->dmb_clientid_arr[bit]; |
| 520 | if (unlikely(client_id == NO_DIBS_CLIENT || |
| 521 | !dibs->subs[client_id])) |
| 522 | continue; |
| 523 | dibs->subs[client_id]->ops->handle_irq(dibs, |
| 524 | bit + ISM_DMB_BIT_OFFSET, |
| 525 | dmbemask); |
| 526 | } |
| 527 | |
| 528 | if (ism->sba->e) { |
| 529 | ism->sba->e = 0; |
| 530 | barrier(); |
| 531 | ism_handle_event(ism); |
| 532 | } |
| 533 | spin_unlock(lock: &dibs->lock); |
| 534 | return IRQ_HANDLED; |
| 535 | } |
| 536 | |
| 537 | static const struct dibs_dev_ops ism_ops = { |
| 538 | .get_fabric_id = ism_get_chid, |
| 539 | .query_remote_gid = ism_query_rgid, |
| 540 | .max_dmbs = ism_max_dmbs, |
| 541 | .register_dmb = ism_register_dmb, |
| 542 | .unregister_dmb = ism_unregister_dmb, |
| 543 | .move_data = ism_move, |
| 544 | .add_vlan_id = ism_add_vlan_id, |
| 545 | .del_vlan_id = ism_del_vlan_id, |
| 546 | .signal_event = ism_signal_ieq, |
| 547 | }; |
| 548 | |
| 549 | static int ism_dev_init(struct ism_dev *ism) |
| 550 | { |
| 551 | struct pci_dev *pdev = ism->pdev; |
| 552 | int ret; |
| 553 | |
| 554 | ret = pci_alloc_irq_vectors(dev: pdev, min_vecs: 1, max_vecs: 1, PCI_IRQ_MSI); |
| 555 | if (ret <= 0) |
| 556 | goto out; |
| 557 | |
| 558 | ret = request_irq(irq: pci_irq_vector(dev: pdev, nr: 0), handler: ism_handle_irq, flags: 0, |
| 559 | name: pci_name(pdev), dev: ism); |
| 560 | if (ret) |
| 561 | goto free_vectors; |
| 562 | |
| 563 | ret = register_sba(ism); |
| 564 | if (ret) |
| 565 | goto free_irq; |
| 566 | |
| 567 | ret = register_ieq(ism); |
| 568 | if (ret) |
| 569 | goto unreg_sba; |
| 570 | |
| 571 | query_info(ism); |
| 572 | return 0; |
| 573 | |
| 574 | unreg_sba: |
| 575 | unregister_sba(ism); |
| 576 | free_irq: |
| 577 | free_irq(pci_irq_vector(dev: pdev, nr: 0), ism); |
| 578 | free_vectors: |
| 579 | pci_free_irq_vectors(dev: pdev); |
| 580 | out: |
| 581 | return ret; |
| 582 | } |
| 583 | |
| 584 | static void ism_dev_exit(struct ism_dev *ism) |
| 585 | { |
| 586 | struct pci_dev *pdev = ism->pdev; |
| 587 | |
| 588 | unregister_ieq(ism); |
| 589 | unregister_sba(ism); |
| 590 | free_irq(pci_irq_vector(dev: pdev, nr: 0), ism); |
| 591 | pci_free_irq_vectors(dev: pdev); |
| 592 | } |
| 593 | |
| 594 | static int ism_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
| 595 | { |
| 596 | struct dibs_dev *dibs; |
| 597 | struct zpci_dev *zdev; |
| 598 | struct ism_dev *ism; |
| 599 | int ret; |
| 600 | |
| 601 | ism = kzalloc(sizeof(*ism), GFP_KERNEL); |
| 602 | if (!ism) |
| 603 | return -ENOMEM; |
| 604 | |
| 605 | spin_lock_init(&ism->cmd_lock); |
| 606 | dev_set_drvdata(dev: &pdev->dev, data: ism); |
| 607 | ism->pdev = pdev; |
| 608 | |
| 609 | ret = pci_enable_device_mem(dev: pdev); |
| 610 | if (ret) |
| 611 | goto err_dev; |
| 612 | |
| 613 | ret = pci_request_mem_regions(pdev, DRV_NAME); |
| 614 | if (ret) |
| 615 | goto err_disable; |
| 616 | |
| 617 | ret = dma_set_mask_and_coherent(dev: &pdev->dev, DMA_BIT_MASK(64)); |
| 618 | if (ret) |
| 619 | goto err_resource; |
| 620 | |
| 621 | dma_set_seg_boundary(dev: &pdev->dev, SZ_1M - 1); |
| 622 | dma_set_max_seg_size(dev: &pdev->dev, SZ_1M); |
| 623 | pci_set_master(dev: pdev); |
| 624 | |
| 625 | dibs = dibs_dev_alloc(); |
| 626 | if (!dibs) { |
| 627 | ret = -ENOMEM; |
| 628 | goto err_resource; |
| 629 | } |
| 630 | /* set this up before we enable interrupts */ |
| 631 | ism->dibs = dibs; |
| 632 | dibs->drv_priv = ism; |
| 633 | dibs->ops = &ism_ops; |
| 634 | |
| 635 | /* enable ism device, but any interrupts and events will be ignored |
| 636 | * before dibs_dev_add() adds it to any clients. |
| 637 | */ |
| 638 | ret = ism_dev_init(ism); |
| 639 | if (ret) |
| 640 | goto err_dibs; |
| 641 | |
| 642 | /* after ism_dev_init() we can call ism function to set gid */ |
| 643 | ret = ism_read_local_gid(dibs); |
| 644 | if (ret) |
| 645 | goto err_ism; |
| 646 | |
| 647 | dibs->dev.parent = &pdev->dev; |
| 648 | |
| 649 | zdev = to_zpci(pdev); |
| 650 | dev_set_name(dev: &dibs->dev, name: "ism%x" , zdev->uid ? zdev->uid : zdev->fid); |
| 651 | |
| 652 | ret = dibs_dev_add(dibs); |
| 653 | if (ret) |
| 654 | goto err_ism; |
| 655 | |
| 656 | return 0; |
| 657 | |
| 658 | err_ism: |
| 659 | ism_dev_exit(ism); |
| 660 | err_dibs: |
| 661 | /* pairs with dibs_dev_alloc() */ |
| 662 | put_device(dev: &dibs->dev); |
| 663 | err_resource: |
| 664 | pci_release_mem_regions(pdev); |
| 665 | err_disable: |
| 666 | pci_disable_device(dev: pdev); |
| 667 | err_dev: |
| 668 | dev_set_drvdata(dev: &pdev->dev, NULL); |
| 669 | kfree(objp: ism); |
| 670 | |
| 671 | return ret; |
| 672 | } |
| 673 | |
| 674 | static void ism_remove(struct pci_dev *pdev) |
| 675 | { |
| 676 | struct ism_dev *ism = dev_get_drvdata(dev: &pdev->dev); |
| 677 | struct dibs_dev *dibs = ism->dibs; |
| 678 | |
| 679 | dibs_dev_del(dibs); |
| 680 | ism_dev_exit(ism); |
| 681 | /* pairs with dibs_dev_alloc() */ |
| 682 | put_device(dev: &dibs->dev); |
| 683 | |
| 684 | pci_release_mem_regions(pdev); |
| 685 | pci_disable_device(dev: pdev); |
| 686 | dev_set_drvdata(dev: &pdev->dev, NULL); |
| 687 | kfree(objp: ism); |
| 688 | } |
| 689 | |
| 690 | static struct pci_driver ism_driver = { |
| 691 | .name = DRV_NAME, |
| 692 | .id_table = ism_device_table, |
| 693 | .probe = ism_probe, |
| 694 | .remove = ism_remove, |
| 695 | }; |
| 696 | |
| 697 | static int __init ism_init(void) |
| 698 | { |
| 699 | int ret; |
| 700 | |
| 701 | ism_debug_info = debug_register("ism" , 2, 1, 16); |
| 702 | if (!ism_debug_info) |
| 703 | return -ENODEV; |
| 704 | |
| 705 | debug_register_view(ism_debug_info, &debug_hex_ascii_view); |
| 706 | ret = pci_register_driver(&ism_driver); |
| 707 | if (ret) |
| 708 | debug_unregister(ism_debug_info); |
| 709 | |
| 710 | return ret; |
| 711 | } |
| 712 | |
| 713 | static void __exit ism_exit(void) |
| 714 | { |
| 715 | pci_unregister_driver(dev: &ism_driver); |
| 716 | debug_unregister(ism_debug_info); |
| 717 | } |
| 718 | |
| 719 | module_init(ism_init); |
| 720 | module_exit(ism_exit); |
| 721 | |