| 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| 3 | * Copyright (C) STMicroelectronics 2017 |
| 4 | * |
| 5 | * Author: Fabrice Gasnier <fabrice.gasnier@st.com> |
| 6 | */ |
| 7 | |
| 8 | #include <linux/bitfield.h> |
| 9 | #include <linux/clk.h> |
| 10 | #include <linux/io.h> |
| 11 | #include <linux/iopoll.h> |
| 12 | #include <linux/module.h> |
| 13 | #include <linux/of.h> |
| 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/regulator/driver.h> |
| 16 | #include <linux/regulator/of_regulator.h> |
| 17 | #include <linux/pm_runtime.h> |
| 18 | |
| 19 | /* STM32 VREFBUF registers */ |
| 20 | #define STM32_VREFBUF_CSR 0x00 |
| 21 | |
| 22 | /* STM32 VREFBUF CSR bitfields */ |
| 23 | #define STM32_VRS GENMASK(6, 4) |
| 24 | #define STM32_VRR BIT(3) |
| 25 | #define STM32_HIZ BIT(1) |
| 26 | #define STM32_ENVR BIT(0) |
| 27 | |
| 28 | #define STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS 10 |
| 29 | |
| 30 | struct stm32_vrefbuf { |
| 31 | void __iomem *base; |
| 32 | struct clk *clk; |
| 33 | struct device *dev; |
| 34 | }; |
| 35 | |
| 36 | static const unsigned int stm32_vrefbuf_voltages[] = { |
| 37 | /* Matches resp. VRS = 000b, 001b, 010b, 011b */ |
| 38 | 2500000, 2048000, 1800000, 1500000, |
| 39 | }; |
| 40 | |
| 41 | static int stm32_vrefbuf_enable(struct regulator_dev *rdev) |
| 42 | { |
| 43 | struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); |
| 44 | u32 val; |
| 45 | int ret; |
| 46 | |
| 47 | ret = pm_runtime_resume_and_get(dev: priv->dev); |
| 48 | if (ret < 0) |
| 49 | return ret; |
| 50 | |
| 51 | val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); |
| 52 | val = (val & ~STM32_HIZ) | STM32_ENVR; |
| 53 | writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); |
| 54 | |
| 55 | /* |
| 56 | * Vrefbuf startup time depends on external capacitor: wait here for |
| 57 | * VRR to be set. That means output has reached expected value. |
| 58 | * ~650us sleep should be enough for caps up to 1.5uF. Use 10ms as |
| 59 | * arbitrary timeout. |
| 60 | */ |
| 61 | ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val, |
| 62 | val & STM32_VRR, 650, 10000); |
| 63 | if (ret) { |
| 64 | dev_err(&rdev->dev, "stm32 vrefbuf timed out!\n" ); |
| 65 | val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); |
| 66 | val = (val & ~STM32_ENVR) | STM32_HIZ; |
| 67 | writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); |
| 68 | } |
| 69 | |
| 70 | pm_runtime_put_autosuspend(dev: priv->dev); |
| 71 | |
| 72 | return ret; |
| 73 | } |
| 74 | |
| 75 | static int stm32_vrefbuf_disable(struct regulator_dev *rdev) |
| 76 | { |
| 77 | struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); |
| 78 | u32 val; |
| 79 | int ret; |
| 80 | |
| 81 | ret = pm_runtime_resume_and_get(dev: priv->dev); |
| 82 | if (ret < 0) |
| 83 | return ret; |
| 84 | |
| 85 | val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); |
| 86 | val &= ~STM32_ENVR; |
| 87 | writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); |
| 88 | |
| 89 | pm_runtime_put_autosuspend(dev: priv->dev); |
| 90 | |
| 91 | return 0; |
| 92 | } |
| 93 | |
| 94 | static int stm32_vrefbuf_is_enabled(struct regulator_dev *rdev) |
| 95 | { |
| 96 | struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); |
| 97 | int ret; |
| 98 | |
| 99 | ret = pm_runtime_resume_and_get(dev: priv->dev); |
| 100 | if (ret < 0) |
| 101 | return ret; |
| 102 | |
| 103 | ret = readl_relaxed(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR; |
| 104 | |
| 105 | pm_runtime_put_autosuspend(dev: priv->dev); |
| 106 | |
| 107 | return ret; |
| 108 | } |
| 109 | |
| 110 | static int stm32_vrefbuf_set_voltage_sel(struct regulator_dev *rdev, |
| 111 | unsigned sel) |
| 112 | { |
| 113 | struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); |
| 114 | u32 val; |
| 115 | int ret; |
| 116 | |
| 117 | ret = pm_runtime_resume_and_get(dev: priv->dev); |
| 118 | if (ret < 0) |
| 119 | return ret; |
| 120 | |
| 121 | val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); |
| 122 | val = (val & ~STM32_VRS) | FIELD_PREP(STM32_VRS, sel); |
| 123 | writel_relaxed(val, priv->base + STM32_VREFBUF_CSR); |
| 124 | |
| 125 | pm_runtime_put_autosuspend(dev: priv->dev); |
| 126 | |
| 127 | return 0; |
| 128 | } |
| 129 | |
| 130 | static int stm32_vrefbuf_get_voltage_sel(struct regulator_dev *rdev) |
| 131 | { |
| 132 | struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); |
| 133 | u32 val; |
| 134 | int ret; |
| 135 | |
| 136 | ret = pm_runtime_resume_and_get(dev: priv->dev); |
| 137 | if (ret < 0) |
| 138 | return ret; |
| 139 | |
| 140 | val = readl_relaxed(priv->base + STM32_VREFBUF_CSR); |
| 141 | ret = FIELD_GET(STM32_VRS, val); |
| 142 | |
| 143 | pm_runtime_put_autosuspend(dev: priv->dev); |
| 144 | |
| 145 | return ret; |
| 146 | } |
| 147 | |
| 148 | static const struct regulator_ops stm32_vrefbuf_volt_ops = { |
| 149 | .enable = stm32_vrefbuf_enable, |
| 150 | .disable = stm32_vrefbuf_disable, |
| 151 | .is_enabled = stm32_vrefbuf_is_enabled, |
| 152 | .get_voltage_sel = stm32_vrefbuf_get_voltage_sel, |
| 153 | .set_voltage_sel = stm32_vrefbuf_set_voltage_sel, |
| 154 | .list_voltage = regulator_list_voltage_table, |
| 155 | }; |
| 156 | |
| 157 | static const struct regulator_desc stm32_vrefbuf_regu = { |
| 158 | .name = "vref" , |
| 159 | .supply_name = "vdda" , |
| 160 | .volt_table = stm32_vrefbuf_voltages, |
| 161 | .n_voltages = ARRAY_SIZE(stm32_vrefbuf_voltages), |
| 162 | .ops = &stm32_vrefbuf_volt_ops, |
| 163 | .off_on_delay = 1000, |
| 164 | .type = REGULATOR_VOLTAGE, |
| 165 | .owner = THIS_MODULE, |
| 166 | }; |
| 167 | |
| 168 | static int stm32_vrefbuf_probe(struct platform_device *pdev) |
| 169 | { |
| 170 | struct stm32_vrefbuf *priv; |
| 171 | struct regulator_config config = { }; |
| 172 | struct regulator_dev *rdev; |
| 173 | int ret; |
| 174 | |
| 175 | priv = devm_kzalloc(dev: &pdev->dev, size: sizeof(*priv), GFP_KERNEL); |
| 176 | if (!priv) |
| 177 | return -ENOMEM; |
| 178 | priv->dev = &pdev->dev; |
| 179 | |
| 180 | priv->base = devm_platform_ioremap_resource(pdev, index: 0); |
| 181 | if (IS_ERR(ptr: priv->base)) |
| 182 | return PTR_ERR(ptr: priv->base); |
| 183 | |
| 184 | priv->clk = devm_clk_get(dev: &pdev->dev, NULL); |
| 185 | if (IS_ERR(ptr: priv->clk)) |
| 186 | return PTR_ERR(ptr: priv->clk); |
| 187 | |
| 188 | pm_runtime_get_noresume(dev: &pdev->dev); |
| 189 | pm_runtime_set_active(dev: &pdev->dev); |
| 190 | pm_runtime_set_autosuspend_delay(dev: &pdev->dev, |
| 191 | STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS); |
| 192 | pm_runtime_use_autosuspend(dev: &pdev->dev); |
| 193 | pm_runtime_enable(dev: &pdev->dev); |
| 194 | |
| 195 | ret = clk_prepare_enable(clk: priv->clk); |
| 196 | if (ret) { |
| 197 | dev_err(&pdev->dev, "clk prepare failed with error %d\n" , ret); |
| 198 | goto err_pm_stop; |
| 199 | } |
| 200 | |
| 201 | config.dev = &pdev->dev; |
| 202 | config.driver_data = priv; |
| 203 | config.of_node = pdev->dev.of_node; |
| 204 | config.init_data = of_get_regulator_init_data(dev: &pdev->dev, |
| 205 | node: pdev->dev.of_node, |
| 206 | desc: &stm32_vrefbuf_regu); |
| 207 | |
| 208 | rdev = regulator_register(dev: &pdev->dev, regulator_desc: &stm32_vrefbuf_regu, config: &config); |
| 209 | if (IS_ERR(ptr: rdev)) { |
| 210 | ret = PTR_ERR(ptr: rdev); |
| 211 | dev_err(&pdev->dev, "register failed with error %d\n" , ret); |
| 212 | goto err_clk_dis; |
| 213 | } |
| 214 | platform_set_drvdata(pdev, data: rdev); |
| 215 | |
| 216 | pm_runtime_put_autosuspend(dev: &pdev->dev); |
| 217 | |
| 218 | return 0; |
| 219 | |
| 220 | err_clk_dis: |
| 221 | clk_disable_unprepare(clk: priv->clk); |
| 222 | err_pm_stop: |
| 223 | pm_runtime_disable(dev: &pdev->dev); |
| 224 | pm_runtime_set_suspended(dev: &pdev->dev); |
| 225 | pm_runtime_put_noidle(dev: &pdev->dev); |
| 226 | |
| 227 | return ret; |
| 228 | } |
| 229 | |
| 230 | static void stm32_vrefbuf_remove(struct platform_device *pdev) |
| 231 | { |
| 232 | struct regulator_dev *rdev = platform_get_drvdata(pdev); |
| 233 | struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); |
| 234 | |
| 235 | pm_runtime_get_sync(dev: &pdev->dev); |
| 236 | regulator_unregister(rdev); |
| 237 | clk_disable_unprepare(clk: priv->clk); |
| 238 | pm_runtime_disable(dev: &pdev->dev); |
| 239 | pm_runtime_set_suspended(dev: &pdev->dev); |
| 240 | pm_runtime_put_noidle(dev: &pdev->dev); |
| 241 | }; |
| 242 | |
| 243 | static int __maybe_unused stm32_vrefbuf_runtime_suspend(struct device *dev) |
| 244 | { |
| 245 | struct regulator_dev *rdev = dev_get_drvdata(dev); |
| 246 | struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); |
| 247 | |
| 248 | clk_disable_unprepare(clk: priv->clk); |
| 249 | |
| 250 | return 0; |
| 251 | } |
| 252 | |
| 253 | static int __maybe_unused stm32_vrefbuf_runtime_resume(struct device *dev) |
| 254 | { |
| 255 | struct regulator_dev *rdev = dev_get_drvdata(dev); |
| 256 | struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev); |
| 257 | |
| 258 | return clk_prepare_enable(clk: priv->clk); |
| 259 | } |
| 260 | |
| 261 | static const struct dev_pm_ops stm32_vrefbuf_pm_ops = { |
| 262 | SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, |
| 263 | pm_runtime_force_resume) |
| 264 | SET_RUNTIME_PM_OPS(stm32_vrefbuf_runtime_suspend, |
| 265 | stm32_vrefbuf_runtime_resume, |
| 266 | NULL) |
| 267 | }; |
| 268 | |
| 269 | static const struct of_device_id __maybe_unused stm32_vrefbuf_of_match[] = { |
| 270 | { .compatible = "st,stm32-vrefbuf" , }, |
| 271 | {}, |
| 272 | }; |
| 273 | MODULE_DEVICE_TABLE(of, stm32_vrefbuf_of_match); |
| 274 | |
| 275 | static struct platform_driver stm32_vrefbuf_driver = { |
| 276 | .probe = stm32_vrefbuf_probe, |
| 277 | .remove = stm32_vrefbuf_remove, |
| 278 | .driver = { |
| 279 | .name = "stm32-vrefbuf" , |
| 280 | .probe_type = PROBE_PREFER_ASYNCHRONOUS, |
| 281 | .of_match_table = of_match_ptr(stm32_vrefbuf_of_match), |
| 282 | .pm = &stm32_vrefbuf_pm_ops, |
| 283 | }, |
| 284 | }; |
| 285 | module_platform_driver(stm32_vrefbuf_driver); |
| 286 | |
| 287 | MODULE_LICENSE("GPL v2" ); |
| 288 | MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>" ); |
| 289 | MODULE_DESCRIPTION("STMicroelectronics STM32 VREFBUF driver" ); |
| 290 | MODULE_ALIAS("platform:stm32-vrefbuf" ); |
| 291 | |