| 1 | /* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */ |
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| 2 | /* Copyright (c) 2021 - 2024 Intel Corporation */ |
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| 3 | #ifndef IG3RDMA_HW_H |
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| 4 | #define IG3RDMA_HW_H |
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| 5 | |
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| 6 | #define IG3_MAX_APFS 1 |
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| 7 | #define IG3_MAX_AVFS 0 |
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| 8 | |
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| 9 | #define IG3_PF_RDMA_REGION_OFFSET 0xBC00000 |
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| 10 | #define IG3_PF_RDMA_REGION_LEN 0x401000 |
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| 11 | #define IG3_VF_RDMA_REGION_OFFSET 0x8C00 |
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| 12 | #define IG3_VF_RDMA_REGION_LEN 0x8400 |
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| 13 | |
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| 14 | enum ig3rdma_device_caps_const { |
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| 15 | IG3RDMA_MAX_WQ_FRAGMENT_COUNT = 14, |
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| 16 | IG3RDMA_MAX_SGE_RD = 14, |
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| 17 | |
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| 18 | IG3RDMA_MAX_STATS_COUNT = 128, |
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| 19 | |
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| 20 | IG3RDMA_MAX_IRD_SIZE = 64, |
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| 21 | IG3RDMA_MAX_ORD_SIZE = 64, |
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| 22 | IG3RDMA_MIN_WQ_SIZE = 16 /* WQEs */, |
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| 23 | IG3RDMA_MAX_INLINE_DATA_SIZE = 216, |
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| 24 | IG3RDMA_MAX_PF_PUSH_PAGE_COUNT = 8192, |
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| 25 | IG3RDMA_MAX_VF_PUSH_PAGE_COUNT = 16, |
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| 26 | }; |
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| 27 | |
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| 28 | void __iomem *ig3rdma_get_reg_addr(struct irdma_hw *hw, u64 reg_offset); |
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| 29 | int ig3rdma_vchnl_send_sync(struct irdma_sc_dev *dev, u8 *msg, u16 len, |
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| 30 | u8 *recv_msg, u16 *recv_len); |
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| 31 | |
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| 32 | #endif /* IG3RDMA_HW_H*/ |
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| 33 | |
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