| 1 | /* SPDX-License-Identifier: MIT */ |
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| 2 | /* |
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| 3 | * Copyright © 2025 Intel Corporation |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef _XE_PMU_TYPES_H_ |
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| 7 | #define _XE_PMU_TYPES_H_ |
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| 8 | |
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| 9 | #include <linux/perf_event.h> |
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| 10 | #include <linux/spinlock_types.h> |
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| 11 | |
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| 12 | #define XE_PMU_MAX_GT 2 |
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| 13 | |
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| 14 | /** |
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| 15 | * struct xe_pmu - PMU related data per Xe device |
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| 16 | * |
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| 17 | * Stores per device PMU info that includes event/perf attributes and sampling |
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| 18 | * counters across all GTs for this device. |
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| 19 | */ |
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| 20 | struct xe_pmu { |
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| 21 | /** |
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| 22 | * @base: PMU base. |
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| 23 | */ |
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| 24 | struct pmu base; |
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| 25 | /** |
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| 26 | * @registered: PMU is registered and not in the unregistering process. |
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| 27 | */ |
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| 28 | bool registered; |
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| 29 | /** |
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| 30 | * @name: Name as registered with perf core. |
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| 31 | */ |
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| 32 | const char *name; |
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| 33 | /** |
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| 34 | * @supported_events: Bitmap of supported events, indexed by event id |
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| 35 | */ |
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| 36 | u64 supported_events; |
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| 37 | }; |
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| 38 | |
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| 39 | #endif |
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| 40 | |
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