| 1 | /* SPDX-License-Identifier: MIT */ |
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| 2 | /* |
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| 3 | * Copyright © 2023 Intel Corporation |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef _XE_PCI_TYPES_H_ |
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| 7 | #define _XE_PCI_TYPES_H_ |
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| 8 | |
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| 9 | #include <linux/types.h> |
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| 10 | |
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| 11 | #include "xe_platform_types.h" |
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| 12 | |
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| 13 | struct xe_subplatform_desc { |
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| 14 | enum xe_subplatform subplatform; |
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| 15 | const char *name; |
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| 16 | const u16 *pciidlist; |
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| 17 | }; |
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| 18 | |
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| 19 | struct xe_device_desc { |
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| 20 | /* Should only ever be set for platforms without GMD_ID */ |
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| 21 | const struct xe_ip *pre_gmdid_graphics_ip; |
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| 22 | /* Should only ever be set for platforms without GMD_ID */ |
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| 23 | const struct xe_ip *pre_gmdid_media_ip; |
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| 24 | |
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| 25 | const char *platform_name; |
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| 26 | const struct xe_subplatform_desc *subplatforms; |
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| 27 | |
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| 28 | enum xe_platform platform; |
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| 29 | |
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| 30 | u8 dma_mask_size; |
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| 31 | u8 max_remote_tiles:2; |
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| 32 | u8 max_gt_per_tile:2; |
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| 33 | u8 va_bits; |
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| 34 | u8 vm_max_level; |
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| 35 | u8 vram_flags; |
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| 36 | |
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| 37 | u8 require_force_probe:1; |
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| 38 | u8 is_dgfx:1; |
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| 39 | |
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| 40 | u8 has_display:1; |
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| 41 | u8 has_fan_control:1; |
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| 42 | u8 has_flat_ccs:1; |
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| 43 | u8 has_gsc_nvm:1; |
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| 44 | u8 has_heci_gscfi:1; |
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| 45 | u8 has_heci_cscfi:1; |
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| 46 | u8 has_late_bind:1; |
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| 47 | u8 has_llc:1; |
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| 48 | u8 has_mbx_power_limits:1; |
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| 49 | u8 has_pxp:1; |
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| 50 | u8 has_sriov:1; |
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| 51 | u8 needs_scratch:1; |
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| 52 | u8 skip_guc_pc:1; |
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| 53 | u8 skip_mtcfg:1; |
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| 54 | u8 skip_pcode:1; |
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| 55 | u8 needs_shared_vf_gt_wq:1; |
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| 56 | }; |
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| 57 | |
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| 58 | struct xe_graphics_desc { |
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| 59 | u64 hw_engine_mask; /* hardware engines provided by graphics IP */ |
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| 60 | |
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| 61 | u8 has_asid:1; |
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| 62 | u8 has_atomic_enable_pte_bit:1; |
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| 63 | u8 has_indirect_ring_state:1; |
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| 64 | u8 has_range_tlb_inval:1; |
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| 65 | u8 has_usm:1; |
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| 66 | u8 has_64bit_timestamp:1; |
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| 67 | }; |
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| 68 | |
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| 69 | struct xe_media_desc { |
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| 70 | u64 hw_engine_mask; /* hardware engines provided by media IP */ |
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| 71 | |
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| 72 | u8 has_indirect_ring_state:1; |
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| 73 | }; |
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| 74 | |
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| 75 | struct xe_ip { |
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| 76 | unsigned int verx100; |
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| 77 | const char *name; |
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| 78 | const void *desc; |
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| 79 | }; |
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| 80 | |
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| 81 | #endif |
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| 82 | |
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