| 1 | /* SPDX-License-Identifier: MIT */ |
| 2 | /* |
| 3 | * Copyright © 2022 Intel Corporation |
| 4 | */ |
| 5 | |
| 6 | #ifndef _XE_PLATFORM_INFO_TYPES_H_ |
| 7 | #define _XE_PLATFORM_INFO_TYPES_H_ |
| 8 | |
| 9 | /* |
| 10 | * Keep this in graphics version based order and chronological order within a |
| 11 | * version |
| 12 | */ |
| 13 | enum xe_platform { |
| 14 | XE_PLATFORM_UNINITIALIZED = 0, |
| 15 | XE_TIGERLAKE, |
| 16 | XE_ROCKETLAKE, |
| 17 | XE_ALDERLAKE_S, |
| 18 | XE_ALDERLAKE_P, |
| 19 | XE_ALDERLAKE_N, |
| 20 | XE_DG1, |
| 21 | XE_DG2, |
| 22 | XE_PVC, |
| 23 | XE_METEORLAKE, |
| 24 | XE_LUNARLAKE, |
| 25 | XE_BATTLEMAGE, |
| 26 | XE_PANTHERLAKE, |
| 27 | XE_NOVALAKE_S, |
| 28 | XE_CRESCENTISLAND, |
| 29 | }; |
| 30 | |
| 31 | enum xe_subplatform { |
| 32 | XE_SUBPLATFORM_UNINITIALIZED = 0, |
| 33 | XE_SUBPLATFORM_NONE, |
| 34 | XE_SUBPLATFORM_ALDERLAKE_P_RPLU, |
| 35 | XE_SUBPLATFORM_ALDERLAKE_S_RPLS, |
| 36 | XE_SUBPLATFORM_DG2_G10, |
| 37 | XE_SUBPLATFORM_DG2_G11, |
| 38 | XE_SUBPLATFORM_DG2_G12, |
| 39 | XE_SUBPLATFORM_BATTLEMAGE_G21, |
| 40 | }; |
| 41 | |
| 42 | #endif |
| 43 | |