1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2022 Intel Corporation
4 */
5
6#ifndef _XE_HW_FENCE_TYPES_H_
7#define _XE_HW_FENCE_TYPES_H_
8
9#include <linux/dma-fence.h>
10#include <linux/iosys-map.h>
11#include <linux/irq_work.h>
12#include <linux/list.h>
13#include <linux/spinlock.h>
14
15struct xe_device;
16struct xe_gt;
17
18/**
19 * struct xe_hw_fence_irq - hardware fence IRQ handler
20 *
21 * One per engine class, signals completed xe_hw_fences, triggered via hw engine
22 * interrupt. On each trigger, search list of pending fences and signal.
23 */
24struct xe_hw_fence_irq {
25 /** @lock: protects all xe_hw_fences + pending list */
26 spinlock_t lock;
27 /** @work: IRQ worker run to signal the fences */
28 struct irq_work work;
29 /** @pending: list of pending xe_hw_fences */
30 struct list_head pending;
31 /** @enabled: fence signaling enabled */
32 bool enabled;
33};
34
35#define MAX_FENCE_NAME_LEN 16
36
37/**
38 * struct xe_hw_fence_ctx - hardware fence context
39 *
40 * The context for a hardware fence. 1 to 1 relationship with xe_engine. Points
41 * to a xe_hw_fence_irq, maintains serial seqno.
42 */
43struct xe_hw_fence_ctx {
44 /** @gt: GT structure of hardware fence context */
45 struct xe_gt *gt;
46 /** @irq: fence irq handler */
47 struct xe_hw_fence_irq *irq;
48 /** @dma_fence_ctx: dma fence context for hardware fence */
49 u64 dma_fence_ctx;
50 /** @next_seqno: next seqno for hardware fence */
51 u32 next_seqno;
52 /** @name: name of hardware fence context */
53 char name[MAX_FENCE_NAME_LEN];
54};
55
56/**
57 * struct xe_hw_fence - hardware fence
58 *
59 * Used to indicate a xe_sched_job is complete via a seqno written to memory.
60 * Signals on error or seqno past.
61 */
62struct xe_hw_fence {
63 /** @dma: base dma fence for hardware fence context */
64 struct dma_fence dma;
65 /** @xe: Xe device for hw fence driver name */
66 struct xe_device *xe;
67 /** @name: name of hardware fence context */
68 char name[MAX_FENCE_NAME_LEN];
69 /** @seqno_map: I/O map for seqno */
70 struct iosys_map seqno_map;
71 /** @irq_link: Link in struct xe_hw_fence_irq.pending */
72 struct list_head irq_link;
73};
74
75#endif
76

source code of linux/drivers/gpu/drm/xe/xe_hw_fence_types.h