1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2021 Intel Corporation
4 */
5
6#ifndef _INTEL_GUC_SLPC_TYPES_H_
7#define _INTEL_GUC_SLPC_TYPES_H_
8
9#include <linux/atomic.h>
10#include <linux/workqueue.h>
11#include <linux/mutex.h>
12#include <linux/types.h>
13
14#define SLPC_RESET_TIMEOUT_MS 5
15
16struct intel_guc_slpc {
17 struct i915_vma *vma;
18 struct slpc_shared_data *vaddr;
19 bool supported;
20 bool selected;
21
22 /* Indicates this is a server part */
23 bool min_is_rpmax;
24
25 /* platform frequency limits */
26 u32 min_freq;
27 u32 rp0_freq;
28 u32 rp1_freq;
29 u32 boost_freq;
30
31 /* frequency softlimits */
32 u32 min_freq_softlimit;
33 u32 max_freq_softlimit;
34 bool ignore_eff_freq;
35
36 /* Base or power saving */
37 u32 power_profile;
38
39 /* cached media ratio mode */
40 u32 media_ratio_mode;
41
42 /* Protects set/reset of boost freq
43 * and value of num_waiters
44 */
45 struct mutex lock;
46
47 struct work_struct boost_work;
48 atomic_t num_waiters;
49 u32 num_boosts;
50};
51
52#endif
53

source code of linux/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h