| 1 | // SPDX-License-Identifier: MIT |
| 2 | /* |
| 3 | * Copyright © 2019 Intel Corporation |
| 4 | */ |
| 5 | |
| 6 | #include <linux/debugfs.h> |
| 7 | |
| 8 | #include <drm/drm_print.h> |
| 9 | |
| 10 | #include "i915_drv.h" |
| 11 | #include "intel_gt.h" |
| 12 | #include "intel_gt_debugfs.h" |
| 13 | #include "intel_gt_engines_debugfs.h" |
| 14 | #include "intel_gt_mcr.h" |
| 15 | #include "intel_gt_pm_debugfs.h" |
| 16 | #include "intel_sseu_debugfs.h" |
| 17 | #include "uc/intel_uc_debugfs.h" |
| 18 | |
| 19 | int intel_gt_debugfs_reset_show(struct intel_gt *gt, u64 *val) |
| 20 | { |
| 21 | int ret = intel_gt_terminally_wedged(gt); |
| 22 | |
| 23 | switch (ret) { |
| 24 | case -EIO: |
| 25 | *val = 1; |
| 26 | return 0; |
| 27 | case 0: |
| 28 | *val = 0; |
| 29 | return 0; |
| 30 | default: |
| 31 | return ret; |
| 32 | } |
| 33 | } |
| 34 | |
| 35 | void intel_gt_debugfs_reset_store(struct intel_gt *gt, u64 val) |
| 36 | { |
| 37 | /* Flush any previous reset before applying for a new one */ |
| 38 | wait_event(gt->reset.queue, |
| 39 | !test_bit(I915_RESET_BACKOFF, >->reset.flags)); |
| 40 | |
| 41 | intel_gt_handle_error(gt, engine_mask: val, I915_ERROR_CAPTURE, |
| 42 | fmt: "Manually reset engine mask to %llx" , val); |
| 43 | } |
| 44 | |
| 45 | /* |
| 46 | * keep the interface clean where the first parameter |
| 47 | * is a 'struct intel_gt *' instead of 'void *' |
| 48 | */ |
| 49 | static int __intel_gt_debugfs_reset_show(void *data, u64 *val) |
| 50 | { |
| 51 | return intel_gt_debugfs_reset_show(gt: data, val); |
| 52 | } |
| 53 | |
| 54 | static int __intel_gt_debugfs_reset_store(void *data, u64 val) |
| 55 | { |
| 56 | intel_gt_debugfs_reset_store(gt: data, val); |
| 57 | |
| 58 | return 0; |
| 59 | } |
| 60 | |
| 61 | DEFINE_SIMPLE_ATTRIBUTE(reset_fops, __intel_gt_debugfs_reset_show, |
| 62 | __intel_gt_debugfs_reset_store, "%llu\n" ); |
| 63 | |
| 64 | static int steering_show(struct seq_file *m, void *data) |
| 65 | { |
| 66 | struct drm_printer p = drm_seq_file_printer(f: m); |
| 67 | struct intel_gt *gt = m->private; |
| 68 | |
| 69 | intel_gt_mcr_report_steering(p: &p, gt, dump_table: true); |
| 70 | |
| 71 | return 0; |
| 72 | } |
| 73 | DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(steering); |
| 74 | |
| 75 | static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root) |
| 76 | { |
| 77 | static const struct intel_gt_debugfs_file files[] = { |
| 78 | { "reset" , &reset_fops, NULL }, |
| 79 | { "steering" , &steering_fops }, |
| 80 | }; |
| 81 | |
| 82 | intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), data: gt); |
| 83 | } |
| 84 | |
| 85 | void intel_gt_debugfs_register(struct intel_gt *gt) |
| 86 | { |
| 87 | struct dentry *debugfs_root = gt->i915->drm.debugfs_root; |
| 88 | struct dentry *root; |
| 89 | char gtname[4]; |
| 90 | |
| 91 | if (!debugfs_root) |
| 92 | return; |
| 93 | |
| 94 | snprintf(buf: gtname, size: sizeof(gtname), fmt: "gt%u" , gt->info.id); |
| 95 | root = debugfs_create_dir(name: gtname, parent: debugfs_root); |
| 96 | if (IS_ERR(ptr: root)) |
| 97 | return; |
| 98 | |
| 99 | gt_debugfs_register(gt, root); |
| 100 | |
| 101 | intel_gt_engines_debugfs_register(gt, root); |
| 102 | intel_gt_pm_debugfs_register(gt, root); |
| 103 | intel_sseu_debugfs_register(gt, root); |
| 104 | |
| 105 | intel_uc_debugfs_register(uc: >->uc, gt_root: root); |
| 106 | } |
| 107 | |
| 108 | void intel_gt_debugfs_register_files(struct dentry *root, |
| 109 | const struct intel_gt_debugfs_file *files, |
| 110 | unsigned long count, void *data) |
| 111 | { |
| 112 | while (count--) { |
| 113 | umode_t mode = files->fops->write ? 0644 : 0444; |
| 114 | |
| 115 | if (!files->eval || files->eval(data)) |
| 116 | debugfs_create_file(files->name, |
| 117 | mode, root, data, |
| 118 | files->fops); |
| 119 | |
| 120 | files++; |
| 121 | } |
| 122 | } |
| 123 | |