| 1 | /* SPDX-License-Identifier: MIT |
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| 2 | * |
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| 3 | * Copyright © 2025 Intel Corporation |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef __INTEL_LT_PHY_H__ |
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| 7 | #define __INTEL_LT_PHY_H__ |
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| 8 | |
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| 9 | #include <linux/types.h> |
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| 10 | |
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| 11 | struct intel_atomic_state; |
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| 12 | struct intel_display; |
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| 13 | struct intel_encoder; |
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| 14 | struct intel_crtc_state; |
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| 15 | struct intel_crtc; |
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| 16 | struct intel_lt_phy_pll_state; |
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| 17 | |
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| 18 | void intel_lt_phy_pll_enable(struct intel_encoder *encoder, |
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| 19 | const struct intel_crtc_state *crtc_state); |
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| 20 | void intel_lt_phy_pll_disable(struct intel_encoder *encoder); |
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| 21 | int |
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| 22 | intel_lt_phy_pll_calc_state(struct intel_crtc_state *crtc_state, |
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| 23 | struct intel_encoder *encoder); |
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| 24 | int intel_lt_phy_calc_port_clock(struct intel_encoder *encoder, |
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| 25 | const struct intel_crtc_state *crtc_state); |
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| 26 | void intel_lt_phy_set_signal_levels(struct intel_encoder *encoder, |
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| 27 | const struct intel_crtc_state *crtc_state); |
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| 28 | void intel_lt_phy_dump_hw_state(struct intel_display *display, |
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| 29 | const struct intel_lt_phy_pll_state *hw_state); |
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| 30 | bool |
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| 31 | intel_lt_phy_pll_compare_hw_state(const struct intel_lt_phy_pll_state *a, |
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| 32 | const struct intel_lt_phy_pll_state *b); |
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| 33 | void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder, |
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| 34 | const struct intel_crtc_state *crtc_state, |
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| 35 | struct intel_lt_phy_pll_state *pll_state); |
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| 36 | void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state, |
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| 37 | struct intel_crtc *crtc); |
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| 38 | int |
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| 39 | intel_lt_phy_calculate_hdmi_state(struct intel_lt_phy_pll_state *lt_state, |
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| 40 | u32 frequency_khz); |
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| 41 | void intel_xe3plpd_pll_enable(struct intel_encoder *encoder, |
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| 42 | const struct intel_crtc_state *crtc_state); |
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| 43 | void intel_xe3plpd_pll_disable(struct intel_encoder *encoder); |
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| 44 | |
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| 45 | #define HAS_LT_PHY(display) (DISPLAY_VER(display) >= 35) |
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| 46 | |
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| 47 | #endif /* __INTEL_LT_PHY_H__ */ |
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| 48 | |
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