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amdgpu_smu.h
cmn2asic_mapping
cmn2asic_msg_mapping
mclk_latency_entries
mclock_latency_table
pptable_funcs
pstates_clk_freq
smu_baco_context
smu_baco_seq
smu_baco_state
smu_bios_boot_up_values
smu_clock_info
smu_clocks
smu_cmn2asic_mapping_type
smu_context
smu_dpm_context
smu_dpm_policy
smu_dpm_policy_ctxt
smu_dpm_policy_desc
smu_feature
smu_feature_cap
smu_feature_cap_id
smu_freq_info
smu_fw_status
smu_hw_power_state
smu_memory_pool_size
smu_perf_level_designation
smu_performance_level
smu_power_context
smu_power_gate
smu_power_src_type
smu_power_state
smu_ppt_limit_level
smu_ppt_limit_type
smu_refreshrate_source
smu_reset_mode
smu_state_classification_block
smu_state_classification_flag
smu_state_display_block
smu_state_memory_block
smu_state_pcie_block
smu_state_software_algorithm_block
smu_state_ui_label
smu_state_validation_block
smu_table
smu_table_cache
smu_table_context
smu_table_id
smu_temp_context
smu_temp_funcs
smu_temperature_range
smu_umd_pstate_table
smu_user_dpm_profile
smu_uvd_clocks
stb_context
[+]
pmfw_if/
smu_11_0_cdr_table.h
smu_types.h
smu_clk_type
smu_feature_mask
smu_message_type
smu_v11_0.h
smu_11_0_dpm_clk_level
smu_11_0_dpm_context
smu_11_0_dpm_table
smu_11_0_dpm_tables
smu_11_0_max_sustainable_clocks
smu_11_0_pcie_table
smu_11_0_power_context
smu_11_0_power_state
smu_11_5_power_context
smu_v11_0_7_pptable.h
SMU_11_0_7_ODFEATURE_CAP
SMU_11_0_7_ODFEATURE_ID
SMU_11_0_7_ODSETTING_ID
SMU_11_0_7_PPCLOCK_ID
SMU_11_0_7_PWRMODE_SETTING
smu_11_0_7_overdrive_table
smu_11_0_7_power_saving_clock_table
smu_11_0_7_powerplay_table
smu_v11_0_pptable.h
SMU_11_0_ODFEATURE_CAP
SMU_11_0_ODFEATURE_ID
SMU_11_0_ODSETTING_ID
SMU_11_0_PPCLOCK_ID
smu_11_0_overdrive_table
smu_11_0_power_saving_clock_table
smu_11_0_powerplay_table
smu_v12_0.h
smu_v13_0.h
smu_13_0_dpm_clk_level
smu_13_0_dpm_context
smu_13_0_dpm_table
smu_13_0_dpm_tables
smu_13_0_max_sustainable_clocks
smu_13_0_pcie_table
smu_13_0_power_context
smu_13_0_power_state
smu_v13_0_0_pptable.h
SMU_13_0_0_ODFEATURE_CAP
SMU_13_0_0_ODFEATURE_ID
SMU_13_0_0_ODSETTING_ID
SMU_13_0_0_PPCLOCK_ID
SMU_13_0_0_PWRMODE_SETTING
smu_13_0_0_overdrive_table
smu_13_0_0_powerplay_table
smu_v13_0_7_pptable.h
SMU_13_0_7_ODFEATURE_CAP
SMU_13_0_7_ODFEATURE_ID
SMU_13_0_7_ODSETTING_ID
SMU_13_0_7_PPCLOCK_ID
SMU_13_0_7_PWRMODE_SETTING
smu_13_0_7_overdrive_table
smu_13_0_7_powerplay_table
smu_v13_0_pptable.h
SMU_13_0_ODFEATURE_CAP
SMU_13_0_ODFEATURE_ID
SMU_13_0_ODSETTING_ID
SMU_13_0_PPCLOCK_ID
smu_13_0_overdrive_table
smu_13_0_power_saving_clock_table
smu_13_0_powerplay_table
smu_v14_0.h
smu_14_0_dpm_clk_level
smu_14_0_dpm_context
smu_14_0_dpm_table
smu_14_0_dpm_tables
smu_14_0_max_sustainable_clocks
smu_14_0_pcie_table
smu_14_0_power_context
smu_14_0_power_state
smu_v14_0_2_pptable.h
SMU_14_0_2_CUSTOM_OD_FEATURE_SETTING_ID
SMU_14_0_2_CUSTOM_OD_SW_FEATURE_CAP
SMU_14_0_2_OD_SW_FEATURE_CAP
SMU_14_0_2_OD_SW_FEATURE_ID
SMU_14_0_2_OD_SW_FEATURE_SETTING_ID
SMU_14_0_2_PWRMODE_SETTING
SMU_14_0_2_overdrive_table_id
smu_14_0_2_custom_overdrive_table
smu_14_0_2_overdrive_table
smu_14_0_2_powerplay_table
smu_14_0_3_custom_powerplay_table
smu_14_0_3_pptable_source