1/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef TONGA_PPTABLE_H
25#define TONGA_PPTABLE_H
26
27/** \file
28 * This is a PowerPlay table header file
29 */
30#pragma pack(push, 1)
31
32#include "hwmgr.h"
33
34#define ATOM_TONGA_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f
35#define ATOM_TONGA_PP_FANPARAMETERS_NOFAN 0x80 /* No fan is connected to this controller. */
36
37#define ATOM_TONGA_PP_THERMALCONTROLLER_NONE 0
38#define ATOM_TONGA_PP_THERMALCONTROLLER_LM96163 17
39#define ATOM_TONGA_PP_THERMALCONTROLLER_TONGA 21
40#define ATOM_TONGA_PP_THERMALCONTROLLER_FIJI 22
41
42/*
43 * Thermal controller 'combo type' to use an external controller for Fan control and an internal controller for thermal.
44 * We probably should reserve the bit 0x80 for this use.
45 * To keep the number of these types low we should also use the same code for all ASICs (i.e. do not distinguish RV6xx and RV7xx Internal here).
46 * The driver can pick the correct internal controller based on the ASIC.
47 */
48
49#define ATOM_TONGA_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL 0x89 /* ADT7473 Fan Control + Internal Thermal Controller */
50#define ATOM_TONGA_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL 0x8D /* EMC2103 Fan Control + Internal Thermal Controller */
51
52/*/* ATOM_TONGA_POWERPLAYTABLE::ulPlatformCaps */
53#define ATOM_TONGA_PP_PLATFORM_CAP_VDDGFX_CONTROL 0x1 /* This cap indicates whether vddgfx will be a separated power rail. */
54#define ATOM_TONGA_PP_PLATFORM_CAP_POWERPLAY 0x2 /* This cap indicates whether this is a mobile part and CCC need to show Powerplay page. */
55#define ATOM_TONGA_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 0x4 /* This cap indicates whether power source notificaiton is done by SBIOS directly. */
56#define ATOM_TONGA_PP_PLATFORM_CAP_DISABLE_VOLTAGE_ISLAND 0x8 /* Enable the option to overwrite voltage island feature to be disabled, regardless of VddGfx power rail support. */
57#define ____RETIRE16____ 0x10
58#define ATOM_TONGA_PP_PLATFORM_CAP_HARDWAREDC 0x20 /* This cap indicates whether power source notificaiton is done by GPIO directly. */
59#define ____RETIRE64____ 0x40
60#define ____RETIRE128____ 0x80
61#define ____RETIRE256____ 0x100
62#define ____RETIRE512____ 0x200
63#define ____RETIRE1024____ 0x400
64#define ____RETIRE2048____ 0x800
65#define ATOM_TONGA_PP_PLATFORM_CAP_MVDD_CONTROL 0x1000 /* This cap indicates dynamic MVDD is required. Uncheck to disable it. */
66#define ____RETIRE2000____ 0x2000
67#define ____RETIRE4000____ 0x4000
68#define ATOM_TONGA_PP_PLATFORM_CAP_VDDCI_CONTROL 0x8000 /* This cap indicates dynamic VDDCI is required. Uncheck to disable it. */
69#define ____RETIRE10000____ 0x10000
70#define ATOM_TONGA_PP_PLATFORM_CAP_BACO 0x20000 /* Enable to indicate the driver supports BACO state. */
71
72#define ATOM_TONGA_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17 0x100000 /* Enable to indicate the driver supports thermal2GPIO17. */
73#define ATOM_TONGA_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL 0x1000000 /* Enable to indicate if thermal and PCC are sharing the same GPIO */
74#define ATOM_TONGA_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE 0x2000000
75
76/* ATOM_PPLIB_NONCLOCK_INFO::usClassification */
77#define ATOM_PPLIB_CLASSIFICATION_UI_MASK 0x0007
78#define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT 0
79#define ATOM_PPLIB_CLASSIFICATION_UI_NONE 0
80#define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY 1
81#define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED 3
82#define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE 5
83/* 2, 4, 6, 7 are reserved */
84
85#define ATOM_PPLIB_CLASSIFICATION_BOOT 0x0008
86#define ATOM_PPLIB_CLASSIFICATION_THERMAL 0x0010
87#define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE 0x0020
88#define ATOM_PPLIB_CLASSIFICATION_REST 0x0040
89#define ATOM_PPLIB_CLASSIFICATION_FORCED 0x0080
90#define ATOM_PPLIB_CLASSIFICATION_ACPI 0x1000
91
92/* ATOM_PPLIB_NONCLOCK_INFO::usClassification2 */
93#define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001
94
95#define ATOM_Tonga_DISALLOW_ON_DC 0x00004000
96#define ATOM_Tonga_ENABLE_VARIBRIGHT 0x00008000
97
98#define ATOM_Tonga_TABLE_REVISION_TONGA 7
99
100typedef struct _ATOM_Tonga_POWERPLAYTABLE {
101 ATOM_COMMON_TABLE_HEADER sHeader;
102
103 UCHAR ucTableRevision;
104 USHORT usTableSize; /*the size of header structure */
105
106 ULONG ulGoldenPPID;
107 ULONG ulGoldenRevision;
108 USHORT usFormatID;
109
110 USHORT usVoltageTime; /*in microseconds */
111 ULONG ulPlatformCaps; /*See ATOM_Tonga_CAPS_* */
112
113 ULONG ulMaxODEngineClock; /*For Overdrive. */
114 ULONG ulMaxODMemoryClock; /*For Overdrive. */
115
116 USHORT usPowerControlLimit;
117 USHORT usUlvVoltageOffset; /*in mv units */
118
119 USHORT usStateArrayOffset; /*points to ATOM_Tonga_State_Array */
120 USHORT usFanTableOffset; /*points to ATOM_Tonga_Fan_Table */
121 USHORT usThermalControllerOffset; /*points to ATOM_Tonga_Thermal_Controller */
122 USHORT usReserv; /*CustomThermalPolicy removed for Tonga. Keep this filed as reserved. */
123
124 USHORT usMclkDependencyTableOffset; /*points to ATOM_Tonga_MCLK_Dependency_Table */
125 USHORT usSclkDependencyTableOffset; /*points to ATOM_Tonga_SCLK_Dependency_Table */
126 USHORT usVddcLookupTableOffset; /*points to ATOM_Tonga_Voltage_Lookup_Table */
127 USHORT usVddgfxLookupTableOffset; /*points to ATOM_Tonga_Voltage_Lookup_Table */
128
129 USHORT usMMDependencyTableOffset; /*points to ATOM_Tonga_MM_Dependency_Table */
130
131 USHORT usVCEStateTableOffset; /*points to ATOM_Tonga_VCE_State_Table; */
132
133 USHORT usPPMTableOffset; /*points to ATOM_Tonga_PPM_Table */
134 USHORT usPowerTuneTableOffset; /*points to ATOM_PowerTune_Table */
135
136 USHORT usHardLimitTableOffset; /*points to ATOM_Tonga_Hard_Limit_Table */
137
138 USHORT usPCIETableOffset; /*points to ATOM_Tonga_PCIE_Table */
139
140 USHORT usGPIOTableOffset; /*points to ATOM_Tonga_GPIO_Table */
141
142 USHORT usReserved[6]; /*TODO: modify reserved size to fit structure aligning */
143} ATOM_Tonga_POWERPLAYTABLE;
144
145typedef struct _ATOM_Tonga_State {
146 UCHAR ucEngineClockIndexHigh;
147 UCHAR ucEngineClockIndexLow;
148
149 UCHAR ucMemoryClockIndexHigh;
150 UCHAR ucMemoryClockIndexLow;
151
152 UCHAR ucPCIEGenLow;
153 UCHAR ucPCIEGenHigh;
154
155 UCHAR ucPCIELaneLow;
156 UCHAR ucPCIELaneHigh;
157
158 USHORT usClassification;
159 ULONG ulCapsAndSettings;
160 USHORT usClassification2;
161 UCHAR ucUnused[4];
162} ATOM_Tonga_State;
163
164typedef struct _ATOM_Tonga_State_Array {
165 UCHAR ucRevId;
166 UCHAR ucNumEntries;
167 ATOM_Tonga_State entries[] __counted_by(ucNumEntries);
168} ATOM_Tonga_State_Array;
169
170typedef struct _ATOM_Tonga_MCLK_Dependency_Record {
171 UCHAR ucVddcInd; /* Vddc voltage */
172 USHORT usVddci;
173 USHORT usVddgfxOffset; /* Offset relative to Vddc voltage */
174 USHORT usMvdd;
175 ULONG ulMclk;
176 USHORT usReserved;
177} ATOM_Tonga_MCLK_Dependency_Record;
178
179typedef struct _ATOM_Tonga_MCLK_Dependency_Table {
180 UCHAR ucRevId;
181 UCHAR ucNumEntries;
182 ATOM_Tonga_MCLK_Dependency_Record entries[] __counted_by(ucNumEntries);
183} ATOM_Tonga_MCLK_Dependency_Table;
184
185typedef struct _ATOM_Tonga_SCLK_Dependency_Record {
186 UCHAR ucVddInd; /* Base voltage */
187 USHORT usVddcOffset; /* Offset relative to base voltage */
188 ULONG ulSclk;
189 USHORT usEdcCurrent;
190 UCHAR ucReliabilityTemperature;
191 UCHAR ucCKSVOffsetandDisable; /* Bits 0~6: Voltage offset for CKS, Bit 7: Disable/enable for the SCLK level. */
192} ATOM_Tonga_SCLK_Dependency_Record;
193
194typedef struct _ATOM_Tonga_SCLK_Dependency_Table {
195 UCHAR ucRevId;
196 UCHAR ucNumEntries;
197 ATOM_Tonga_SCLK_Dependency_Record entries[] __counted_by(ucNumEntries);
198} ATOM_Tonga_SCLK_Dependency_Table;
199
200typedef struct _ATOM_Polaris_SCLK_Dependency_Record {
201 UCHAR ucVddInd; /* Base voltage */
202 USHORT usVddcOffset; /* Offset relative to base voltage */
203 ULONG ulSclk;
204 USHORT usEdcCurrent;
205 UCHAR ucReliabilityTemperature;
206 UCHAR ucCKSVOffsetandDisable; /* Bits 0~6: Voltage offset for CKS, Bit 7: Disable/enable for the SCLK level. */
207 ULONG ulSclkOffset;
208} ATOM_Polaris_SCLK_Dependency_Record;
209
210typedef struct _ATOM_Polaris_SCLK_Dependency_Table {
211 UCHAR ucRevId;
212 UCHAR ucNumEntries;
213 ATOM_Polaris_SCLK_Dependency_Record entries[] __counted_by(ucNumEntries);
214} ATOM_Polaris_SCLK_Dependency_Table;
215
216typedef struct _ATOM_Tonga_PCIE_Record {
217 UCHAR ucPCIEGenSpeed;
218 UCHAR usPCIELaneWidth;
219 UCHAR ucReserved[2];
220} ATOM_Tonga_PCIE_Record;
221
222typedef struct _ATOM_Tonga_PCIE_Table {
223 UCHAR ucRevId;
224 UCHAR ucNumEntries;
225 ATOM_Tonga_PCIE_Record entries[] __counted_by(ucNumEntries);
226} ATOM_Tonga_PCIE_Table;
227
228typedef struct _ATOM_Polaris10_PCIE_Record {
229 UCHAR ucPCIEGenSpeed;
230 UCHAR usPCIELaneWidth;
231 UCHAR ucReserved[2];
232 ULONG ulPCIE_Sclk;
233} ATOM_Polaris10_PCIE_Record;
234
235typedef struct _ATOM_Polaris10_PCIE_Table {
236 UCHAR ucRevId;
237 UCHAR ucNumEntries;
238 ATOM_Polaris10_PCIE_Record entries[] __counted_by(ucNumEntries);
239} ATOM_Polaris10_PCIE_Table;
240
241
242typedef struct _ATOM_Tonga_MM_Dependency_Record {
243 UCHAR ucVddcInd; /* VDDC voltage */
244 USHORT usVddgfxOffset; /* Offset relative to VDDC voltage */
245 ULONG ulDClk; /* UVD D-clock */
246 ULONG ulVClk; /* UVD V-clock */
247 ULONG ulEClk; /* VCE clock */
248 ULONG ulAClk; /* ACP clock */
249 ULONG ulSAMUClk; /* SAMU clock */
250} ATOM_Tonga_MM_Dependency_Record;
251
252typedef struct _ATOM_Tonga_MM_Dependency_Table {
253 UCHAR ucRevId;
254 UCHAR ucNumEntries;
255 ATOM_Tonga_MM_Dependency_Record entries[] __counted_by(ucNumEntries);
256} ATOM_Tonga_MM_Dependency_Table;
257
258typedef struct _ATOM_Tonga_Voltage_Lookup_Record {
259 USHORT usVdd; /* Base voltage */
260 USHORT usCACLow;
261 USHORT usCACMid;
262 USHORT usCACHigh;
263} ATOM_Tonga_Voltage_Lookup_Record;
264
265typedef struct _ATOM_Tonga_Voltage_Lookup_Table {
266 UCHAR ucRevId;
267 UCHAR ucNumEntries;
268 ATOM_Tonga_Voltage_Lookup_Record entries[] __counted_by(ucNumEntries);
269} ATOM_Tonga_Voltage_Lookup_Table;
270
271typedef struct _ATOM_Tonga_Fan_Table {
272 UCHAR ucRevId; /* Change this if the table format changes or version changes so that the other fields are not the same. */
273 UCHAR ucTHyst; /* Temperature hysteresis. Integer. */
274 USHORT usTMin; /* The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. */
275 USHORT usTMed; /* The middle temperature where we change slopes. */
276 USHORT usTHigh; /* The high point above TMed for adjusting the second slope. */
277 USHORT usPWMMin; /* The minimum PWM value in percent (0.01% increments). */
278 USHORT usPWMMed; /* The PWM value (in percent) at TMed. */
279 USHORT usPWMHigh; /* The PWM value at THigh. */
280 USHORT usTMax; /* The max temperature */
281 UCHAR ucFanControlMode; /* Legacy or Fuzzy Fan mode */
282 USHORT usFanPWMMax; /* Maximum allowed fan power in percent */
283 USHORT usFanOutputSensitivity; /* Sensitivity of fan reaction to temepature changes */
284 USHORT usFanRPMMax; /* The default value in RPM */
285 ULONG ulMinFanSCLKAcousticLimit; /* Minimum Fan Controller SCLK Frequency Acoustic Limit. */
286 UCHAR ucTargetTemperature; /* Advanced fan controller target temperature. */
287 UCHAR ucMinimumPWMLimit; /* The minimum PWM that the advanced fan controller can set. This should be set to the highest PWM that will run the fan at its lowest RPM. */
288 USHORT usReserved;
289} ATOM_Tonga_Fan_Table;
290
291typedef struct _ATOM_Fiji_Fan_Table {
292 UCHAR ucRevId; /* Change this if the table format changes or version changes so that the other fields are not the same. */
293 UCHAR ucTHyst; /* Temperature hysteresis. Integer. */
294 USHORT usTMin; /* The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. */
295 USHORT usTMed; /* The middle temperature where we change slopes. */
296 USHORT usTHigh; /* The high point above TMed for adjusting the second slope. */
297 USHORT usPWMMin; /* The minimum PWM value in percent (0.01% increments). */
298 USHORT usPWMMed; /* The PWM value (in percent) at TMed. */
299 USHORT usPWMHigh; /* The PWM value at THigh. */
300 USHORT usTMax; /* The max temperature */
301 UCHAR ucFanControlMode; /* Legacy or Fuzzy Fan mode */
302 USHORT usFanPWMMax; /* Maximum allowed fan power in percent */
303 USHORT usFanOutputSensitivity; /* Sensitivity of fan reaction to temepature changes */
304 USHORT usFanRPMMax; /* The default value in RPM */
305 ULONG ulMinFanSCLKAcousticLimit; /* Minimum Fan Controller SCLK Frequency Acoustic Limit. */
306 UCHAR ucTargetTemperature; /* Advanced fan controller target temperature. */
307 UCHAR ucMinimumPWMLimit; /* The minimum PWM that the advanced fan controller can set. This should be set to the highest PWM that will run the fan at its lowest RPM. */
308 USHORT usFanGainEdge;
309 USHORT usFanGainHotspot;
310 USHORT usFanGainLiquid;
311 USHORT usFanGainVrVddc;
312 USHORT usFanGainVrMvdd;
313 USHORT usFanGainPlx;
314 USHORT usFanGainHbm;
315 USHORT usReserved;
316} ATOM_Fiji_Fan_Table;
317
318typedef struct _ATOM_Polaris_Fan_Table {
319 UCHAR ucRevId; /* Change this if the table format changes or version changes so that the other fields are not the same. */
320 UCHAR ucTHyst; /* Temperature hysteresis. Integer. */
321 USHORT usTMin; /* The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. */
322 USHORT usTMed; /* The middle temperature where we change slopes. */
323 USHORT usTHigh; /* The high point above TMed for adjusting the second slope. */
324 USHORT usPWMMin; /* The minimum PWM value in percent (0.01% increments). */
325 USHORT usPWMMed; /* The PWM value (in percent) at TMed. */
326 USHORT usPWMHigh; /* The PWM value at THigh. */
327 USHORT usTMax; /* The max temperature */
328 UCHAR ucFanControlMode; /* Legacy or Fuzzy Fan mode */
329 USHORT usFanPWMMax; /* Maximum allowed fan power in percent */
330 USHORT usFanOutputSensitivity; /* Sensitivity of fan reaction to temepature changes */
331 USHORT usFanRPMMax; /* The default value in RPM */
332 ULONG ulMinFanSCLKAcousticLimit; /* Minimum Fan Controller SCLK Frequency Acoustic Limit. */
333 UCHAR ucTargetTemperature; /* Advanced fan controller target temperature. */
334 UCHAR ucMinimumPWMLimit; /* The minimum PWM that the advanced fan controller can set. This should be set to the highest PWM that will run the fan at its lowest RPM. */
335 USHORT usFanGainEdge;
336 USHORT usFanGainHotspot;
337 USHORT usFanGainLiquid;
338 USHORT usFanGainVrVddc;
339 USHORT usFanGainVrMvdd;
340 USHORT usFanGainPlx;
341 USHORT usFanGainHbm;
342 UCHAR ucEnableZeroRPM;
343 UCHAR ucFanStopTemperature;
344 UCHAR ucFanStartTemperature;
345 USHORT usReserved;
346} ATOM_Polaris_Fan_Table;
347
348typedef struct _ATOM_Tonga_Thermal_Controller {
349 UCHAR ucRevId;
350 UCHAR ucType; /* one of ATOM_TONGA_PP_THERMALCONTROLLER_* */
351 UCHAR ucI2cLine; /* as interpreted by DAL I2C */
352 UCHAR ucI2cAddress;
353 UCHAR ucFanParameters; /* Fan Control Parameters. */
354 UCHAR ucFanMinRPM; /* Fan Minimum RPM (hundreds) -- for display purposes only. */
355 UCHAR ucFanMaxRPM; /* Fan Maximum RPM (hundreds) -- for display purposes only. */
356 UCHAR ucReserved;
357 UCHAR ucFlags; /* to be defined */
358} ATOM_Tonga_Thermal_Controller;
359
360typedef struct _ATOM_Tonga_VCE_State_Record {
361 UCHAR ucVCEClockIndex; /*index into usVCEDependencyTableOffset of 'ATOM_Tonga_MM_Dependency_Table' type */
362 UCHAR ucFlag; /* 2 bits indicates memory p-states */
363 UCHAR ucSCLKIndex; /*index into ATOM_Tonga_SCLK_Dependency_Table */
364 UCHAR ucMCLKIndex; /*index into ATOM_Tonga_MCLK_Dependency_Table */
365} ATOM_Tonga_VCE_State_Record;
366
367typedef struct _ATOM_Tonga_VCE_State_Table {
368 UCHAR ucRevId;
369 UCHAR ucNumEntries;
370 ATOM_Tonga_VCE_State_Record entries[] __counted_by(ucNumEntries);
371} ATOM_Tonga_VCE_State_Table;
372
373typedef struct _ATOM_Tonga_PowerTune_Table {
374 UCHAR ucRevId;
375 USHORT usTDP;
376 USHORT usConfigurableTDP;
377 USHORT usTDC;
378 USHORT usBatteryPowerLimit;
379 USHORT usSmallPowerLimit;
380 USHORT usLowCACLeakage;
381 USHORT usHighCACLeakage;
382 USHORT usMaximumPowerDeliveryLimit;
383 USHORT usTjMax;
384 USHORT usPowerTuneDataSetID;
385 USHORT usEDCLimit;
386 USHORT usSoftwareShutdownTemp;
387 USHORT usClockStretchAmount;
388 USHORT usReserve[2];
389} ATOM_Tonga_PowerTune_Table;
390
391typedef struct _ATOM_Fiji_PowerTune_Table {
392 UCHAR ucRevId;
393 USHORT usTDP;
394 USHORT usConfigurableTDP;
395 USHORT usTDC;
396 USHORT usBatteryPowerLimit;
397 USHORT usSmallPowerLimit;
398 USHORT usLowCACLeakage;
399 USHORT usHighCACLeakage;
400 USHORT usMaximumPowerDeliveryLimit;
401 USHORT usTjMax; /* For Fiji, this is also usTemperatureLimitEdge; */
402 USHORT usPowerTuneDataSetID;
403 USHORT usEDCLimit;
404 USHORT usSoftwareShutdownTemp;
405 USHORT usClockStretchAmount;
406 USHORT usTemperatureLimitHotspot; /*The following are added for Fiji */
407 USHORT usTemperatureLimitLiquid1;
408 USHORT usTemperatureLimitLiquid2;
409 USHORT usTemperatureLimitVrVddc;
410 USHORT usTemperatureLimitVrMvdd;
411 USHORT usTemperatureLimitPlx;
412 UCHAR ucLiquid1_I2C_address; /*Liquid */
413 UCHAR ucLiquid2_I2C_address;
414 UCHAR ucLiquid_I2C_Line;
415 UCHAR ucVr_I2C_address; /*VR */
416 UCHAR ucVr_I2C_Line;
417 UCHAR ucPlx_I2C_address; /*PLX */
418 UCHAR ucPlx_I2C_Line;
419 USHORT usReserved;
420} ATOM_Fiji_PowerTune_Table;
421
422typedef struct _ATOM_Polaris_PowerTune_Table {
423 UCHAR ucRevId;
424 USHORT usTDP;
425 USHORT usConfigurableTDP;
426 USHORT usTDC;
427 USHORT usBatteryPowerLimit;
428 USHORT usSmallPowerLimit;
429 USHORT usLowCACLeakage;
430 USHORT usHighCACLeakage;
431 USHORT usMaximumPowerDeliveryLimit;
432 USHORT usTjMax; // For Fiji, this is also usTemperatureLimitEdge;
433 USHORT usPowerTuneDataSetID;
434 USHORT usEDCLimit;
435 USHORT usSoftwareShutdownTemp;
436 USHORT usClockStretchAmount;
437 USHORT usTemperatureLimitHotspot; //The following are added for Fiji
438 USHORT usTemperatureLimitLiquid1;
439 USHORT usTemperatureLimitLiquid2;
440 USHORT usTemperatureLimitVrVddc;
441 USHORT usTemperatureLimitVrMvdd;
442 USHORT usTemperatureLimitPlx;
443 UCHAR ucLiquid1_I2C_address; //Liquid
444 UCHAR ucLiquid2_I2C_address;
445 UCHAR ucLiquid_I2C_Line;
446 UCHAR ucVr_I2C_address; //VR
447 UCHAR ucVr_I2C_Line;
448 UCHAR ucPlx_I2C_address; //PLX
449 UCHAR ucPlx_I2C_Line;
450 USHORT usBoostPowerLimit;
451 UCHAR ucCKS_LDO_REFSEL;
452 UCHAR ucHotSpotOnly;
453 UCHAR ucReserve;
454 USHORT usReserve;
455} ATOM_Polaris_PowerTune_Table;
456
457#define ATOM_PPM_A_A 1
458#define ATOM_PPM_A_I 2
459typedef struct _ATOM_Tonga_PPM_Table {
460 UCHAR ucRevId;
461 UCHAR ucPpmDesign; /*A+I or A+A */
462 USHORT usCpuCoreNumber;
463 ULONG ulPlatformTDP;
464 ULONG ulSmallACPlatformTDP;
465 ULONG ulPlatformTDC;
466 ULONG ulSmallACPlatformTDC;
467 ULONG ulApuTDP;
468 ULONG ulDGpuTDP;
469 ULONG ulDGpuUlvPower;
470 ULONG ulTjmax;
471} ATOM_Tonga_PPM_Table;
472
473typedef struct _ATOM_Tonga_Hard_Limit_Record {
474 ULONG ulSCLKLimit;
475 ULONG ulMCLKLimit;
476 USHORT usVddcLimit;
477 USHORT usVddciLimit;
478 USHORT usVddgfxLimit;
479} ATOM_Tonga_Hard_Limit_Record;
480
481typedef struct _ATOM_Tonga_Hard_Limit_Table {
482 UCHAR ucRevId;
483 UCHAR ucNumEntries;
484 ATOM_Tonga_Hard_Limit_Record entries[] __counted_by(ucNumEntries);
485} ATOM_Tonga_Hard_Limit_Table;
486
487typedef struct _ATOM_Tonga_GPIO_Table {
488 UCHAR ucRevId;
489 UCHAR ucVRHotTriggeredSclkDpmIndex; /* If VRHot signal is triggered SCLK will be limited to this DPM level */
490 UCHAR ucReserve[5];
491} ATOM_Tonga_GPIO_Table;
492
493typedef struct _PPTable_Generic_SubTable_Header {
494 UCHAR ucRevId;
495} PPTable_Generic_SubTable_Header;
496
497
498#pragma pack(pop)
499
500
501#endif
502

source code of linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/pptable_v1_0.h