1/*
2* Copyright 2019 Advanced Micro Devices, Inc.
3*
4* Permission is hereby granted, free of charge, to any person obtaining a
5* copy of this software and associated documentation files (the "Software"),
6* to deal in the Software without restriction, including without limitation
7* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8* and/or sell copies of the Software, and to permit persons to whom the
9* Software is furnished to do so, subject to the following conditions:
10*
11* The above copyright notice and this permission notice shall be included in
12* all copies or substantial portions of the Software.
13*
14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20* OTHER DEALINGS IN THE SOFTWARE.
21*
22* Authors: AMD
23*
24*/
25
26#ifndef __DC_HDCP_TYPES_H__
27#define __DC_HDCP_TYPES_H__
28
29enum hdcp_message_id {
30 HDCP_MESSAGE_ID_INVALID = -1,
31
32 /* HDCP 1.4 */
33
34 HDCP_MESSAGE_ID_READ_BKSV = 0,
35 /* HDMI is called Ri', DP is called R0' */
36 HDCP_MESSAGE_ID_READ_RI_R0,
37 HDCP_MESSAGE_ID_READ_PJ,
38 HDCP_MESSAGE_ID_WRITE_AKSV,
39 HDCP_MESSAGE_ID_WRITE_AINFO,
40 HDCP_MESSAGE_ID_WRITE_AN,
41 HDCP_MESSAGE_ID_READ_VH_X,
42 HDCP_MESSAGE_ID_READ_VH_0,
43 HDCP_MESSAGE_ID_READ_VH_1,
44 HDCP_MESSAGE_ID_READ_VH_2,
45 HDCP_MESSAGE_ID_READ_VH_3,
46 HDCP_MESSAGE_ID_READ_VH_4,
47 HDCP_MESSAGE_ID_READ_BCAPS,
48 HDCP_MESSAGE_ID_READ_BSTATUS,
49 HDCP_MESSAGE_ID_READ_KSV_FIFO,
50 HDCP_MESSAGE_ID_READ_BINFO,
51
52 /* HDCP 2.2 */
53
54 HDCP_MESSAGE_ID_HDCP2VERSION,
55 HDCP_MESSAGE_ID_RX_CAPS,
56 HDCP_MESSAGE_ID_WRITE_AKE_INIT,
57 HDCP_MESSAGE_ID_READ_AKE_SEND_CERT,
58 HDCP_MESSAGE_ID_WRITE_AKE_NO_STORED_KM,
59 HDCP_MESSAGE_ID_WRITE_AKE_STORED_KM,
60 HDCP_MESSAGE_ID_READ_AKE_SEND_H_PRIME,
61 HDCP_MESSAGE_ID_READ_AKE_SEND_PAIRING_INFO,
62 HDCP_MESSAGE_ID_WRITE_LC_INIT,
63 HDCP_MESSAGE_ID_READ_LC_SEND_L_PRIME,
64 HDCP_MESSAGE_ID_WRITE_SKE_SEND_EKS,
65 HDCP_MESSAGE_ID_READ_REPEATER_AUTH_SEND_RECEIVERID_LIST,
66 HDCP_MESSAGE_ID_WRITE_REPEATER_AUTH_SEND_ACK,
67 HDCP_MESSAGE_ID_WRITE_REPEATER_AUTH_STREAM_MANAGE,
68 HDCP_MESSAGE_ID_READ_REPEATER_AUTH_STREAM_READY,
69 HDCP_MESSAGE_ID_READ_RXSTATUS,
70 HDCP_MESSAGE_ID_WRITE_CONTENT_STREAM_TYPE,
71
72 /* PS175 chip */
73
74 HDCP_MESSAGE_ID_WRITE_PS175_CMD,
75 HDCP_MESSAGE_ID_READ_PS175_RSP,
76
77 HDCP_MESSAGE_ID_MAX
78};
79
80enum hdcp_version {
81 HDCP_Unknown = 0,
82 HDCP_VERSION_14,
83 HDCP_VERSION_22,
84};
85
86enum hdcp_link {
87 HDCP_LINK_PRIMARY,
88 HDCP_LINK_SECONDARY
89};
90
91enum hdcp_message_status {
92 HDCP_MESSAGE_SUCCESS,
93 HDCP_MESSAGE_FAILURE,
94 HDCP_MESSAGE_UNSUPPORTED
95};
96
97struct hdcp_protection_message {
98 enum hdcp_version version;
99 /* relevant only for DVI */
100 enum hdcp_link link;
101 enum hdcp_message_id msg_id;
102 uint32_t length;
103 uint8_t max_retries;
104 uint8_t *data;
105 enum hdcp_message_status status;
106};
107
108#endif
109

source code of linux/drivers/gpu/drm/amd/display/include/hdcp_msg_types.h