| 1 | /* |
| 2 | * Copyright 2021 Advanced Micro Devices, Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: AMD |
| 23 | * |
| 24 | */ |
| 25 | |
| 26 | #ifndef __RC_CALC_FPU_H__ |
| 27 | #define __RC_CALC_FPU_H__ |
| 28 | |
| 29 | #include "os_types.h" |
| 30 | #include <drm/display/drm_dsc.h> |
| 31 | |
| 32 | #define QP_SET_SIZE 15 |
| 33 | |
| 34 | typedef int qp_set[QP_SET_SIZE]; |
| 35 | |
| 36 | struct rc_params { |
| 37 | int rc_quant_incr_limit0; |
| 38 | int rc_quant_incr_limit1; |
| 39 | int initial_fullness_offset; |
| 40 | int initial_xmit_delay; |
| 41 | int first_line_bpg_offset; |
| 42 | int second_line_bpg_offset; |
| 43 | int flatness_min_qp; |
| 44 | int flatness_max_qp; |
| 45 | int flatness_det_thresh; |
| 46 | qp_set qp_min; |
| 47 | qp_set qp_max; |
| 48 | qp_set ofs; |
| 49 | int rc_model_size; |
| 50 | int rc_edge_factor; |
| 51 | int rc_tgt_offset_hi; |
| 52 | int rc_tgt_offset_lo; |
| 53 | int rc_buf_thresh[QP_SET_SIZE - 1]; |
| 54 | }; |
| 55 | |
| 56 | enum colour_mode { |
| 57 | CM_RGB, /* 444 RGB */ |
| 58 | CM_444, /* 444 YUV or simple 422 */ |
| 59 | CM_422, /* native 422 */ |
| 60 | CM_420 /* native 420 */ |
| 61 | }; |
| 62 | |
| 63 | enum bits_per_comp { |
| 64 | BPC_8 = 8, |
| 65 | BPC_10 = 10, |
| 66 | BPC_12 = 12 |
| 67 | }; |
| 68 | |
| 69 | enum max_min { |
| 70 | DAL_MM_MIN = 0, |
| 71 | DAL_MM_MAX = 1 |
| 72 | }; |
| 73 | |
| 74 | struct qp_entry { |
| 75 | float bpp; |
| 76 | const qp_set qps; |
| 77 | }; |
| 78 | |
| 79 | typedef struct qp_entry qp_table[]; |
| 80 | |
| 81 | void _do_calc_rc_params(struct rc_params *rc, |
| 82 | enum colour_mode cm, |
| 83 | enum bits_per_comp bpc, |
| 84 | u16 drm_bpp, |
| 85 | bool is_navite_422_or_420, |
| 86 | int slice_width, |
| 87 | int slice_height, |
| 88 | int minor_version); |
| 89 | |
| 90 | #endif |
| 91 | |