| 1 | /* SPDX-License-Identifier: MIT */ |
| 2 | /* |
| 3 | * Copyright 2021 Advanced Micro Devices, Inc. |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice shall be included in |
| 13 | * all copies or substantial portions of the Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 19 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 20 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 21 | * OTHER DEALINGS IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: AMD |
| 24 | * |
| 25 | */ |
| 26 | |
| 27 | #ifndef AMDGPU_DM_AMDGPU_DM_REPLAY_H_ |
| 28 | #define AMDGPU_DM_AMDGPU_DM_REPLAY_H_ |
| 29 | |
| 30 | #include "amdgpu.h" |
| 31 | |
| 32 | enum replay_enable_option { |
| 33 | pr_enable_option_static_screen = 0x1, |
| 34 | pr_enable_option_mpo_video = 0x2, |
| 35 | pr_enable_option_full_screen_video = 0x4, |
| 36 | pr_enable_option_general_ui = 0x8, |
| 37 | pr_enable_option_static_screen_coasting = 0x10000, |
| 38 | pr_enable_option_mpo_video_coasting = 0x20000, |
| 39 | pr_enable_option_full_screen_video_coasting = 0x40000, |
| 40 | }; |
| 41 | |
| 42 | bool amdgpu_dm_link_supports_replay(struct dc_link *link, struct amdgpu_dm_connector *aconnector); |
| 43 | bool amdgpu_dm_replay_enable(struct dc_stream_state *stream, bool enable); |
| 44 | bool amdgpu_dm_set_replay_caps(struct dc_link *link, struct amdgpu_dm_connector *aconnector); |
| 45 | bool amdgpu_dm_link_setup_replay(struct dc_link *link, struct amdgpu_dm_connector *aconnector); |
| 46 | bool amdgpu_dm_replay_disable(struct dc_stream_state *stream); |
| 47 | bool amdgpu_dm_replay_disable_all(struct amdgpu_display_manager *dm); |
| 48 | |
| 49 | #endif /* AMDGPU_DM_AMDGPU_DM_REPLAY_H_ */ |
| 50 | |