1/*
2 * Copyright 2021 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#include "kfd_device_queue_manager.h"
25#include "gc/gc_11_0_0_offset.h"
26#include "gc/gc_11_0_0_sh_mask.h"
27#include "soc21_enum.h"
28
29static int update_qpd_v11(struct device_queue_manager *dqm,
30 struct qcm_process_device *qpd);
31static void init_sdma_vm_v11(struct device_queue_manager *dqm, struct queue *q,
32 struct qcm_process_device *qpd);
33static bool set_cache_memory_policy_v11(struct device_queue_manager *dqm,
34 struct qcm_process_device *qpd,
35 enum cache_policy default_policy,
36 enum cache_policy alternate_policy,
37 void __user *alternate_aperture_base,
38 uint64_t alternate_aperture_size,
39 u32 misc_process_properties);
40
41void device_queue_manager_init_v11(
42 struct device_queue_manager_asic_ops *asic_ops)
43{
44 asic_ops->set_cache_memory_policy = set_cache_memory_policy_v11;
45 asic_ops->update_qpd = update_qpd_v11;
46 asic_ops->init_sdma_vm = init_sdma_vm_v11;
47 asic_ops->mqd_manager_init = mqd_manager_init_v11;
48}
49
50static uint32_t compute_sh_mem_bases_64bit(struct kfd_process_device *pdd)
51{
52 uint32_t shared_base = pdd->lds_base >> 48;
53 uint32_t private_base = pdd->scratch_base >> 48;
54
55 return (shared_base << SH_MEM_BASES__SHARED_BASE__SHIFT) |
56 private_base;
57}
58
59static bool set_cache_memory_policy_v11(struct device_queue_manager *dqm,
60 struct qcm_process_device *qpd,
61 enum cache_policy default_policy,
62 enum cache_policy alternate_policy,
63 void __user *alternate_aperture_base,
64 uint64_t alternate_aperture_size,
65 u32 misc_process_properties)
66{
67 qpd->sh_mem_config = (SH_MEM_ALIGNMENT_MODE_UNALIGNED <<
68 SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) |
69 (3 << SH_MEM_CONFIG__INITIAL_INST_PREFETCH__SHIFT);
70
71 qpd->sh_mem_ape1_limit = 0;
72 qpd->sh_mem_ape1_base = 0;
73 qpd->sh_mem_bases = compute_sh_mem_bases_64bit(qpd_to_pdd(qpd));
74
75 pr_debug("sh_mem_bases 0x%X\n", qpd->sh_mem_bases);
76 return true;
77}
78
79static int update_qpd_v11(struct device_queue_manager *dqm,
80 struct qcm_process_device *qpd)
81{
82 return 0;
83}
84
85static void init_sdma_vm_v11(struct device_queue_manager *dqm, struct queue *q,
86 struct qcm_process_device *qpd)
87{
88 /* Not needed on SDMAv4 onwards any more */
89 q->properties.sdma_vm_addr = 0;
90}
91

source code of linux/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_v11.c