1/*
2 * Copyright 2022 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __VCN_V4_0_3_H__
25#define __VCN_V4_0_3_H__
26
27enum amdgpu_vcn_v4_0_3_sub_block {
28 AMDGPU_VCN_V4_0_3_VCPU_VCODEC = 0,
29
30 AMDGPU_VCN_V4_0_3_MAX_SUB_BLOCK,
31};
32
33extern const struct amdgpu_ip_block_version vcn_v4_0_3_ip_block;
34
35void vcn_v4_0_3_enc_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
36 uint32_t val, uint32_t mask);
37
38void vcn_v4_0_3_enc_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg,
39 uint32_t val);
40void vcn_v4_0_3_enc_ring_emit_vm_flush(struct amdgpu_ring *ring,
41 unsigned int vmid, uint64_t pd_addr);
42void vcn_v4_0_3_ring_emit_hdp_flush(struct amdgpu_ring *ring);
43
44#endif /* __VCN_V4_0_3_H__ */
45

source code of linux/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.h