| 1 | /* |
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| 2 | * Copyright 2022 Advanced Micro Devices, Inc. |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice shall be included in |
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| 12 | * all copies or substantial portions of the Software. |
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| 13 | * |
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
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| 21 | * |
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| 22 | */ |
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| 23 | |
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| 24 | #ifndef __VCN_SW_RING_H__ |
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| 25 | #define __VCN_SW_RING_H__ |
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| 26 | |
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| 27 | #define VCN_SW_RING_EMIT_FRAME_SIZE \ |
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| 28 | (4 + /* vcn_dec_sw_ring_emit_vm_flush */ \ |
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| 29 | 5 + 5 + /* vcn_dec_sw_ring_emit_fence x2 vm fence */ \ |
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| 30 | 1) /* vcn_dec_sw_ring_insert_end */ |
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| 31 | |
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| 32 | void vcn_dec_sw_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, |
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| 33 | u64 seq, uint32_t flags); |
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| 34 | void vcn_dec_sw_ring_insert_end(struct amdgpu_ring *ring); |
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| 35 | void vcn_dec_sw_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_job *job, |
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| 36 | struct amdgpu_ib *ib, uint32_t flags); |
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| 37 | void vcn_dec_sw_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg, |
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| 38 | uint32_t val, uint32_t mask); |
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| 39 | void vcn_dec_sw_ring_emit_vm_flush(struct amdgpu_ring *ring, |
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| 40 | uint32_t vmid, uint64_t pd_addr); |
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| 41 | void vcn_dec_sw_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, |
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| 42 | uint32_t val); |
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| 43 | |
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| 44 | #endif /* __VCN_SW_RING_H__ */ |
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| 45 | |
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