| 1 | /* |
| 2 | * Copyright 2023 Advanced Micro Devices, Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | */ |
| 23 | #include "amdgpu.h" |
| 24 | #include "smuio_v14_0_2.h" |
| 25 | #include "smuio/smuio_14_0_2_offset.h" |
| 26 | #include "smuio/smuio_14_0_2_sh_mask.h" |
| 27 | #include <linux/preempt.h> |
| 28 | |
| 29 | static u32 smuio_v14_0_2_get_rom_index_offset(struct amdgpu_device *adev) |
| 30 | { |
| 31 | return SOC15_REG_OFFSET(SMUIO, 0, regROM_INDEX); |
| 32 | } |
| 33 | |
| 34 | static u32 smuio_v14_0_2_get_rom_data_offset(struct amdgpu_device *adev) |
| 35 | { |
| 36 | return SOC15_REG_OFFSET(SMUIO, 0, regROM_DATA); |
| 37 | } |
| 38 | |
| 39 | static u64 smuio_v14_0_2_get_gpu_clock_counter(struct amdgpu_device *adev) |
| 40 | { |
| 41 | u64 clock; |
| 42 | u64 clock_counter_lo, clock_counter_hi_pre, clock_counter_hi_after; |
| 43 | |
| 44 | preempt_disable(); |
| 45 | clock_counter_hi_pre = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_UPPER); |
| 46 | clock_counter_lo = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_LOWER); |
| 47 | /* the clock counter may be udpated during polling the counters */ |
| 48 | clock_counter_hi_after = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_UPPER); |
| 49 | if (clock_counter_hi_pre != clock_counter_hi_after) |
| 50 | clock_counter_lo = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_LOWER); |
| 51 | preempt_enable(); |
| 52 | |
| 53 | clock = clock_counter_lo | (clock_counter_hi_after << 32ULL); |
| 54 | |
| 55 | return clock; |
| 56 | } |
| 57 | |
| 58 | const struct amdgpu_smuio_funcs smuio_v14_0_2_funcs = { |
| 59 | .get_rom_index_offset = smuio_v14_0_2_get_rom_index_offset, |
| 60 | .get_rom_data_offset = smuio_v14_0_2_get_rom_data_offset, |
| 61 | .get_gpu_clock_counter = smuio_v14_0_2_get_gpu_clock_counter, |
| 62 | }; |
| 63 | |