| 1 | /* |
| 2 | * Copyright 2017 Advanced Micro Devices, Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | */ |
| 23 | |
| 24 | #ifndef __MMSCH_V1_0_H__ |
| 25 | #define __MMSCH_V1_0_H__ |
| 26 | |
| 27 | #define MMSCH_VERSION 0x1 |
| 28 | |
| 29 | enum mmsch_v1_0_command_type { |
| 30 | MMSCH_COMMAND__DIRECT_REG_WRITE = 0, |
| 31 | MMSCH_COMMAND__DIRECT_REG_POLLING = 2, |
| 32 | MMSCH_COMMAND__DIRECT_REG_READ_MODIFY_WRITE = 3, |
| 33 | MMSCH_COMMAND__INDIRECT_REG_WRITE = 8, |
| 34 | MMSCH_COMMAND__END = 0xf |
| 35 | }; |
| 36 | |
| 37 | struct { |
| 38 | uint32_t ; |
| 39 | uint32_t ; |
| 40 | uint32_t ; |
| 41 | uint32_t ; |
| 42 | uint32_t ; |
| 43 | uint32_t ; |
| 44 | uint32_t ; |
| 45 | uint32_t ; |
| 46 | }; |
| 47 | |
| 48 | struct { |
| 49 | uint32_t ; |
| 50 | uint32_t ; |
| 51 | uint32_t ; |
| 52 | }; |
| 53 | |
| 54 | struct { |
| 55 | uint32_t ; |
| 56 | uint32_t ; |
| 57 | struct mmsch_vf_eng_init_header [2]; |
| 58 | }; |
| 59 | |
| 60 | struct { |
| 61 | uint32_t : 28; |
| 62 | uint32_t command_type : 4; |
| 63 | }; |
| 64 | |
| 65 | struct { |
| 66 | uint32_t : 20; |
| 67 | uint32_t : 8; |
| 68 | uint32_t command_type : 4; |
| 69 | }; |
| 70 | |
| 71 | struct mmsch_v1_0_cmd_direct_write { |
| 72 | struct mmsch_v1_0_cmd_direct_reg_header ; |
| 73 | uint32_t reg_value; |
| 74 | }; |
| 75 | |
| 76 | struct mmsch_v1_0_cmd_direct_read_modify_write { |
| 77 | struct mmsch_v1_0_cmd_direct_reg_header ; |
| 78 | uint32_t write_data; |
| 79 | uint32_t mask_value; |
| 80 | }; |
| 81 | |
| 82 | struct mmsch_v1_0_cmd_direct_polling { |
| 83 | struct mmsch_v1_0_cmd_direct_reg_header ; |
| 84 | uint32_t mask_value; |
| 85 | uint32_t wait_value; |
| 86 | }; |
| 87 | |
| 88 | struct mmsch_v1_0_cmd_end { |
| 89 | struct mmsch_v1_0_cmd_direct_reg_header ; |
| 90 | }; |
| 91 | |
| 92 | struct mmsch_v1_0_cmd_indirect_write { |
| 93 | struct mmsch_v1_0_cmd_indirect_reg_header ; |
| 94 | uint32_t reg_value; |
| 95 | }; |
| 96 | |
| 97 | static inline void mmsch_v1_0_insert_direct_wt(struct mmsch_v1_0_cmd_direct_write *direct_wt, |
| 98 | uint32_t *init_table, |
| 99 | uint32_t reg_offset, |
| 100 | uint32_t value) |
| 101 | { |
| 102 | direct_wt->cmd_header.reg_offset = reg_offset; |
| 103 | direct_wt->reg_value = value; |
| 104 | memcpy((void *)init_table, direct_wt, sizeof(struct mmsch_v1_0_cmd_direct_write)); |
| 105 | } |
| 106 | |
| 107 | static inline void mmsch_v1_0_insert_direct_rd_mod_wt(struct mmsch_v1_0_cmd_direct_read_modify_write *direct_rd_mod_wt, |
| 108 | uint32_t *init_table, |
| 109 | uint32_t reg_offset, |
| 110 | uint32_t mask, uint32_t data) |
| 111 | { |
| 112 | direct_rd_mod_wt->cmd_header.reg_offset = reg_offset; |
| 113 | direct_rd_mod_wt->mask_value = mask; |
| 114 | direct_rd_mod_wt->write_data = data; |
| 115 | memcpy((void *)init_table, direct_rd_mod_wt, |
| 116 | sizeof(struct mmsch_v1_0_cmd_direct_read_modify_write)); |
| 117 | } |
| 118 | |
| 119 | static inline void mmsch_v1_0_insert_direct_poll(struct mmsch_v1_0_cmd_direct_polling *direct_poll, |
| 120 | uint32_t *init_table, |
| 121 | uint32_t reg_offset, |
| 122 | uint32_t mask, uint32_t wait) |
| 123 | { |
| 124 | direct_poll->cmd_header.reg_offset = reg_offset; |
| 125 | direct_poll->mask_value = mask; |
| 126 | direct_poll->wait_value = wait; |
| 127 | memcpy((void *)init_table, direct_poll, sizeof(struct mmsch_v1_0_cmd_direct_polling)); |
| 128 | } |
| 129 | |
| 130 | #define MMSCH_V1_0_INSERT_DIRECT_RD_MOD_WT(reg, mask, data) { \ |
| 131 | mmsch_v1_0_insert_direct_rd_mod_wt(&direct_rd_mod_wt, \ |
| 132 | init_table, (reg), \ |
| 133 | (mask), (data)); \ |
| 134 | init_table += sizeof(struct mmsch_v1_0_cmd_direct_read_modify_write)/4; \ |
| 135 | table_size += sizeof(struct mmsch_v1_0_cmd_direct_read_modify_write)/4; \ |
| 136 | } |
| 137 | |
| 138 | #define MMSCH_V1_0_INSERT_DIRECT_WT(reg, value) { \ |
| 139 | mmsch_v1_0_insert_direct_wt(&direct_wt, \ |
| 140 | init_table, (reg), \ |
| 141 | (value)); \ |
| 142 | init_table += sizeof(struct mmsch_v1_0_cmd_direct_write)/4; \ |
| 143 | table_size += sizeof(struct mmsch_v1_0_cmd_direct_write)/4; \ |
| 144 | } |
| 145 | |
| 146 | #define MMSCH_V1_0_INSERT_DIRECT_POLL(reg, mask, wait) { \ |
| 147 | mmsch_v1_0_insert_direct_poll(&direct_poll, \ |
| 148 | init_table, (reg), \ |
| 149 | (mask), (wait)); \ |
| 150 | init_table += sizeof(struct mmsch_v1_0_cmd_direct_polling)/4; \ |
| 151 | table_size += sizeof(struct mmsch_v1_0_cmd_direct_polling)/4; \ |
| 152 | } |
| 153 | |
| 154 | #endif |
| 155 | |