1/*
2 * Copyright 2024 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23#include "amdgpu.h"
24#include "df_v4_15.h"
25
26#include "df/df_4_15_offset.h"
27#include "df/df_4_15_sh_mask.h"
28
29static void df_v4_15_hw_init(struct amdgpu_device *adev)
30{
31 if (adev->have_atomics_support) {
32 uint32_t tmp;
33 uint32_t dis_lcl_proc = (1 << 1 |
34 1 << 2 |
35 1 << 13);
36
37 tmp = RREG32_SOC15(DF, 0, regNCSConfigurationRegister1);
38 tmp |= (dis_lcl_proc << NCSConfigurationRegister1__DisIntAtomicsLclProcessing__SHIFT);
39 WREG32_SOC15(DF, 0, regNCSConfigurationRegister1, tmp);
40 }
41}
42
43const struct amdgpu_df_funcs df_v4_15_funcs = {
44 .hw_init = df_v4_15_hw_init
45};
46

source code of linux/drivers/gpu/drm/amd/amdgpu/df_v4_15.c