| 1 | /* |
| 2 | * Copyright 2016 Advanced Micro Devices, Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | |
| 22 | * * Author: Monk.liu@amd.com |
| 23 | */ |
| 24 | |
| 25 | #include <drm/drm_exec.h> |
| 26 | |
| 27 | #include "amdgpu.h" |
| 28 | |
| 29 | uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev) |
| 30 | { |
| 31 | uint64_t addr = AMDGPU_VA_RESERVED_CSA_START(adev); |
| 32 | |
| 33 | addr = amdgpu_gmc_sign_extend(addr); |
| 34 | |
| 35 | return addr; |
| 36 | } |
| 37 | |
| 38 | int amdgpu_allocate_static_csa(struct amdgpu_device *adev, struct amdgpu_bo **bo, |
| 39 | u32 domain, uint32_t size) |
| 40 | { |
| 41 | void *ptr; |
| 42 | |
| 43 | amdgpu_bo_create_kernel(adev, size, PAGE_SIZE, |
| 44 | domain, bo_ptr: bo, |
| 45 | NULL, cpu_addr: &ptr); |
| 46 | if (!*bo) |
| 47 | return -ENOMEM; |
| 48 | |
| 49 | memset(ptr, 0, size); |
| 50 | adev->virt.csa_cpu_addr = ptr; |
| 51 | return 0; |
| 52 | } |
| 53 | |
| 54 | void amdgpu_free_static_csa(struct amdgpu_bo **bo) |
| 55 | { |
| 56 | amdgpu_bo_free_kernel(bo, NULL, NULL); |
| 57 | } |
| 58 | |
| 59 | /* |
| 60 | * amdgpu_map_static_csa should be called during amdgpu_vm_init |
| 61 | * it maps virtual address amdgpu_csa_vaddr() to this VM, and each command |
| 62 | * submission of GFX should use this virtual address within META_DATA init |
| 63 | * package to support SRIOV gfx preemption. |
| 64 | */ |
| 65 | int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm, |
| 66 | struct amdgpu_bo *bo, struct amdgpu_bo_va **bo_va, |
| 67 | uint64_t csa_addr, uint32_t size) |
| 68 | { |
| 69 | struct drm_exec exec; |
| 70 | int r; |
| 71 | |
| 72 | drm_exec_init(exec: &exec, DRM_EXEC_INTERRUPTIBLE_WAIT, nr: 0); |
| 73 | drm_exec_until_all_locked(&exec) { |
| 74 | r = amdgpu_vm_lock_pd(vm, exec: &exec, num_fences: 0); |
| 75 | if (likely(!r)) |
| 76 | r = drm_exec_lock_obj(exec: &exec, obj: &bo->tbo.base); |
| 77 | drm_exec_retry_on_contention(&exec); |
| 78 | if (unlikely(r)) { |
| 79 | DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n" , r); |
| 80 | goto error; |
| 81 | } |
| 82 | } |
| 83 | |
| 84 | *bo_va = amdgpu_vm_bo_add(adev, vm, bo); |
| 85 | if (!*bo_va) { |
| 86 | r = -ENOMEM; |
| 87 | goto error; |
| 88 | } |
| 89 | |
| 90 | r = amdgpu_vm_bo_map(adev, bo_va: *bo_va, addr: csa_addr, offset: 0, size, |
| 91 | AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE | |
| 92 | AMDGPU_PTE_EXECUTABLE); |
| 93 | |
| 94 | if (r) { |
| 95 | DRM_ERROR("failed to do bo_map on static CSA, err=%d\n" , r); |
| 96 | amdgpu_vm_bo_del(adev, bo_va: *bo_va); |
| 97 | goto error; |
| 98 | } |
| 99 | |
| 100 | error: |
| 101 | drm_exec_fini(exec: &exec); |
| 102 | return r; |
| 103 | } |
| 104 | |
| 105 | int amdgpu_unmap_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm, |
| 106 | struct amdgpu_bo *bo, struct amdgpu_bo_va *bo_va, |
| 107 | uint64_t csa_addr) |
| 108 | { |
| 109 | struct drm_exec exec; |
| 110 | int r; |
| 111 | |
| 112 | drm_exec_init(exec: &exec, flags: 0, nr: 0); |
| 113 | drm_exec_until_all_locked(&exec) { |
| 114 | r = amdgpu_vm_lock_pd(vm, exec: &exec, num_fences: 0); |
| 115 | if (likely(!r)) |
| 116 | r = drm_exec_lock_obj(exec: &exec, obj: &bo->tbo.base); |
| 117 | drm_exec_retry_on_contention(&exec); |
| 118 | if (unlikely(r)) { |
| 119 | DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n" , r); |
| 120 | goto error; |
| 121 | } |
| 122 | } |
| 123 | |
| 124 | r = amdgpu_vm_bo_unmap(adev, bo_va, addr: csa_addr); |
| 125 | if (r) { |
| 126 | DRM_ERROR("failed to do bo_unmap on static CSA, err=%d\n" , r); |
| 127 | goto error; |
| 128 | } |
| 129 | |
| 130 | amdgpu_vm_bo_del(adev, bo_va); |
| 131 | |
| 132 | error: |
| 133 | drm_exec_fini(exec: &exec); |
| 134 | return r; |
| 135 | } |
| 136 | |