1/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
2/* Copyright(c) 2014 - 2020 Intel Corporation */
3#ifndef _ICP_QAT_FW_PKE_
4#define _ICP_QAT_FW_PKE_
5
6#include "icp_qat_fw.h"
7
8struct icp_qat_fw_req_hdr_pke_cd_pars {
9 __u64 content_desc_addr;
10 __u32 content_desc_resrvd;
11 __u32 func_id;
12};
13
14struct icp_qat_fw_req_pke_mid {
15 __u64 opaque;
16 __u64 src_data_addr;
17 __u64 dest_data_addr;
18};
19
20struct icp_qat_fw_req_pke_hdr {
21 __u8 resrvd1;
22 __u8 resrvd2;
23 __u8 service_type;
24 __u8 hdr_flags;
25 __u16 comn_req_flags;
26 __u16 resrvd4;
27 struct icp_qat_fw_req_hdr_pke_cd_pars cd_pars;
28};
29
30struct icp_qat_fw_pke_request {
31 struct icp_qat_fw_req_pke_hdr pke_hdr;
32 struct icp_qat_fw_req_pke_mid pke_mid;
33 __u8 output_param_count;
34 __u8 input_param_count;
35 __u16 resrvd1;
36 __u32 resrvd2;
37 __u64 next_req_adr;
38};
39
40struct icp_qat_fw_resp_pke_hdr {
41 __u8 resrvd1;
42 __u8 resrvd2;
43 __u8 response_type;
44 __u8 hdr_flags;
45 __u16 comn_resp_flags;
46 __u16 resrvd4;
47};
48
49struct icp_qat_fw_pke_resp {
50 struct icp_qat_fw_resp_pke_hdr pke_resp_hdr;
51 __u64 opaque;
52 __u64 src_data_addr;
53 __u64 dest_data_addr;
54};
55
56#define ICP_QAT_FW_PKE_HDR_VALID_FLAG_BITPOS 7
57#define ICP_QAT_FW_PKE_HDR_VALID_FLAG_MASK 0x1
58#define ICP_QAT_FW_PKE_RESP_PKE_STAT_GET(status_word) \
59 QAT_FIELD_GET(((status_word >> ICP_QAT_FW_COMN_ONE_BYTE_SHIFT) & \
60 ICP_QAT_FW_COMN_SINGLE_BYTE_MASK), \
61 QAT_COMN_RESP_PKE_STATUS_BITPOS, \
62 QAT_COMN_RESP_PKE_STATUS_MASK)
63
64#define ICP_QAT_FW_PKE_HDR_VALID_FLAG_SET(hdr_t, val) \
65 QAT_FIELD_SET((hdr_t.hdr_flags), (val), \
66 ICP_QAT_FW_PKE_HDR_VALID_FLAG_BITPOS, \
67 ICP_QAT_FW_PKE_HDR_VALID_FLAG_MASK)
68#endif
69

source code of linux/drivers/crypto/intel/qat/qat_common/icp_qat_fw_pke.h