1/* SPDX-License-Identifier: GPL-2.0-only */
2/* Copyright(c) 2025 Intel Corporation */
3#ifndef ADF_GEN6_PM_H
4#define ADF_GEN6_PM_H
5
6#include <linux/bits.h>
7#include <linux/time.h>
8
9struct adf_accel_dev;
10
11/* Power management */
12#define ADF_GEN6_PM_POLL_DELAY_US 20
13#define ADF_GEN6_PM_POLL_TIMEOUT_US USEC_PER_SEC
14#define ADF_GEN6_PM_STATUS 0x50A00C
15#define ADF_GEN6_PM_INTERRUPT 0x50A028
16
17/* Power management source in ERRSOU2 and ERRMSK2 */
18#define ADF_GEN6_PM_SOU BIT(18)
19
20/* cpm_pm_interrupt bitfields */
21#define ADF_GEN6_PM_DRV_ACTIVE BIT(20)
22
23#define ADF_GEN6_PM_DEFAULT_IDLE_FILTER 0x6
24
25/* cpm_pm_status bitfields */
26#define ADF_GEN6_PM_INIT_STATE BIT(21)
27#define ADF_GEN6_PM_CPM_PM_STATE_MASK GENMASK(22, 20)
28
29/* fusectl0 bitfields */
30#define ADF_GEN6_PM_ENABLE_PM_MASK BIT(21)
31#define ADF_GEN6_PM_ENABLE_PM_IDLE_MASK BIT(22)
32#define ADF_GEN6_PM_ENABLE_DEEP_PM_IDLE_MASK BIT(23)
33
34/* cpm_pm_fw_init bitfields */
35#define ADF_GEN6_PM_IDLE_FILTER_MASK GENMASK(5, 3)
36#define ADF_GEN6_PM_IDLE_ENABLE_MASK BIT(2)
37
38/* ssm_pm_enable bitfield */
39#define ADF_GEN6_PM_SSM_PM_ENABLE_MASK BIT(0)
40
41/* ssm_pm_domain_status bitfield */
42#define ADF_GEN6_PM_DOMAIN_POWERED_UP_MASK BIT(0)
43
44#ifdef CONFIG_DEBUG_FS
45void adf_gen6_init_dev_pm_data(struct adf_accel_dev *accel_dev);
46#else
47static inline void adf_gen6_init_dev_pm_data(struct adf_accel_dev *accel_dev)
48{
49}
50#endif /* CONFIG_DEBUG_FS */
51
52#endif /* ADF_GEN6_PM_H */
53

source code of linux/drivers/crypto/intel/qat/qat_common/adf_gen6_pm.h