1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2014 Philipp Zabel, Pengutronix
4 *
5 * PWM (mis)used as clock output
6 */
7#include <linux/clk-provider.h>
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/of.h>
11#include <linux/platform_device.h>
12#include <linux/pwm.h>
13
14struct clk_pwm {
15 struct clk_hw hw;
16 struct pwm_device *pwm;
17 struct pwm_state state;
18 u32 fixed_rate;
19};
20
21static inline struct clk_pwm *to_clk_pwm(struct clk_hw *hw)
22{
23 return container_of(hw, struct clk_pwm, hw);
24}
25
26static int clk_pwm_enable(struct clk_hw *hw)
27{
28 struct clk_pwm *clk_pwm = to_clk_pwm(hw);
29
30 return pwm_apply_atomic(pwm: clk_pwm->pwm, state: &clk_pwm->state);
31}
32
33static void clk_pwm_disable(struct clk_hw *hw)
34{
35 struct clk_pwm *clk_pwm = to_clk_pwm(hw);
36 struct pwm_state state = clk_pwm->state;
37
38 state.enabled = false;
39
40 pwm_apply_atomic(pwm: clk_pwm->pwm, state: &state);
41}
42
43static int clk_pwm_prepare(struct clk_hw *hw)
44{
45 struct clk_pwm *clk_pwm = to_clk_pwm(hw);
46
47 return pwm_apply_might_sleep(pwm: clk_pwm->pwm, state: &clk_pwm->state);
48}
49
50static void clk_pwm_unprepare(struct clk_hw *hw)
51{
52 struct clk_pwm *clk_pwm = to_clk_pwm(hw);
53
54 pwm_disable(pwm: clk_pwm->pwm);
55}
56
57static unsigned long clk_pwm_recalc_rate(struct clk_hw *hw,
58 unsigned long parent_rate)
59{
60 struct clk_pwm *clk_pwm = to_clk_pwm(hw);
61
62 return clk_pwm->fixed_rate;
63}
64
65static int clk_pwm_get_duty_cycle(struct clk_hw *hw, struct clk_duty *duty)
66{
67 struct clk_pwm *clk_pwm = to_clk_pwm(hw);
68 struct pwm_state state;
69 int ret;
70
71 ret = pwm_get_state_hw(pwm: clk_pwm->pwm, state: &state);
72 if (ret)
73 return ret;
74
75 duty->num = state.duty_cycle;
76 duty->den = state.period;
77
78 return 0;
79}
80
81static const struct clk_ops clk_pwm_ops_atomic = {
82 .enable = clk_pwm_enable,
83 .disable = clk_pwm_disable,
84 .recalc_rate = clk_pwm_recalc_rate,
85 .get_duty_cycle = clk_pwm_get_duty_cycle,
86};
87
88static const struct clk_ops clk_pwm_ops = {
89 .prepare = clk_pwm_prepare,
90 .unprepare = clk_pwm_unprepare,
91 .recalc_rate = clk_pwm_recalc_rate,
92 .get_duty_cycle = clk_pwm_get_duty_cycle,
93};
94
95static int clk_pwm_probe(struct platform_device *pdev)
96{
97 struct device_node *node = pdev->dev.of_node;
98 struct clk_init_data init;
99 struct clk_pwm *clk_pwm;
100 struct pwm_device *pwm;
101 struct pwm_args pargs;
102 const char *clk_name;
103 int ret;
104
105 clk_pwm = devm_kzalloc(dev: &pdev->dev, size: sizeof(*clk_pwm), GFP_KERNEL);
106 if (!clk_pwm)
107 return -ENOMEM;
108
109 pwm = devm_pwm_get(dev: &pdev->dev, NULL);
110 if (IS_ERR(ptr: pwm))
111 return PTR_ERR(ptr: pwm);
112
113 pwm_get_args(pwm, args: &pargs);
114 if (!pargs.period) {
115 dev_err(&pdev->dev, "invalid PWM period\n");
116 return -EINVAL;
117 }
118
119 if (of_property_read_u32(np: node, propname: "clock-frequency", out_value: &clk_pwm->fixed_rate))
120 clk_pwm->fixed_rate = div64_u64(NSEC_PER_SEC, divisor: pargs.period);
121
122 if (!clk_pwm->fixed_rate) {
123 dev_err(&pdev->dev, "fixed_rate cannot be zero\n");
124 return -EINVAL;
125 }
126
127 if (pargs.period != NSEC_PER_SEC / clk_pwm->fixed_rate &&
128 pargs.period != DIV_ROUND_UP(NSEC_PER_SEC, clk_pwm->fixed_rate)) {
129 dev_err(&pdev->dev,
130 "clock-frequency does not match PWM period\n");
131 return -EINVAL;
132 }
133
134 pwm_init_state(pwm, state: &clk_pwm->state);
135 pwm_set_relative_duty_cycle(state: &clk_pwm->state, duty_cycle: 1, scale: 2);
136 clk_pwm->state.enabled = true;
137
138 clk_name = node->name;
139 of_property_read_string(np: node, propname: "clock-output-names", out_string: &clk_name);
140
141 init.name = clk_name;
142 if (pwm_might_sleep(pwm))
143 init.ops = &clk_pwm_ops;
144 else
145 init.ops = &clk_pwm_ops_atomic;
146
147 init.flags = 0;
148 init.num_parents = 0;
149
150 clk_pwm->pwm = pwm;
151 clk_pwm->hw.init = &init;
152 ret = devm_clk_hw_register(dev: &pdev->dev, hw: &clk_pwm->hw);
153 if (ret)
154 return ret;
155
156 return of_clk_add_hw_provider(np: node, get: of_clk_hw_simple_get, data: &clk_pwm->hw);
157}
158
159static void clk_pwm_remove(struct platform_device *pdev)
160{
161 of_clk_del_provider(np: pdev->dev.of_node);
162}
163
164static const struct of_device_id clk_pwm_dt_ids[] = {
165 { .compatible = "pwm-clock" },
166 { }
167};
168MODULE_DEVICE_TABLE(of, clk_pwm_dt_ids);
169
170static struct platform_driver clk_pwm_driver = {
171 .probe = clk_pwm_probe,
172 .remove = clk_pwm_remove,
173 .driver = {
174 .name = "pwm-clock",
175 .of_match_table = clk_pwm_dt_ids,
176 },
177};
178
179module_platform_driver(clk_pwm_driver);
180
181MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>");
182MODULE_DESCRIPTION("PWM clock driver");
183MODULE_LICENSE("GPL");
184

source code of linux/drivers/clk/clk-pwm.c