1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Raspberry Pi driver for firmware controlled clocks
4 *
5 * Even though clk-bcm2835 provides an interface to the hardware registers for
6 * the system clocks we've had to factor out 'pllb' as the firmware 'owns' it.
7 * We're not allowed to change it directly as we might race with the
8 * over-temperature and under-voltage protections provided by the firmware.
9 *
10 * Copyright (C) 2019 Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
11 */
12
13#include <linux/clkdev.h>
14#include <linux/clk-provider.h>
15#include <linux/io.h>
16#include <linux/module.h>
17#include <linux/platform_device.h>
18
19#include <soc/bcm2835/raspberrypi-firmware.h>
20
21static char *rpi_firmware_clk_names[] = {
22 [RPI_FIRMWARE_EMMC_CLK_ID] = "emmc",
23 [RPI_FIRMWARE_UART_CLK_ID] = "uart",
24 [RPI_FIRMWARE_ARM_CLK_ID] = "arm",
25 [RPI_FIRMWARE_CORE_CLK_ID] = "core",
26 [RPI_FIRMWARE_V3D_CLK_ID] = "v3d",
27 [RPI_FIRMWARE_H264_CLK_ID] = "h264",
28 [RPI_FIRMWARE_ISP_CLK_ID] = "isp",
29 [RPI_FIRMWARE_SDRAM_CLK_ID] = "sdram",
30 [RPI_FIRMWARE_PIXEL_CLK_ID] = "pixel",
31 [RPI_FIRMWARE_PWM_CLK_ID] = "pwm",
32 [RPI_FIRMWARE_HEVC_CLK_ID] = "hevc",
33 [RPI_FIRMWARE_EMMC2_CLK_ID] = "emmc2",
34 [RPI_FIRMWARE_M2MC_CLK_ID] = "m2mc",
35 [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = "pixel-bvb",
36 [RPI_FIRMWARE_VEC_CLK_ID] = "vec",
37 [RPI_FIRMWARE_DISP_CLK_ID] = "disp",
38};
39
40#define RPI_FIRMWARE_STATE_ENABLE_BIT BIT(0)
41#define RPI_FIRMWARE_STATE_WAIT_BIT BIT(1)
42
43struct raspberrypi_clk_variant;
44
45struct raspberrypi_clk {
46 struct device *dev;
47 struct rpi_firmware *firmware;
48 struct platform_device *cpufreq;
49};
50
51struct raspberrypi_clk_data {
52 struct clk_hw hw;
53
54 unsigned int id;
55 struct raspberrypi_clk_variant *variant;
56
57 struct raspberrypi_clk *rpi;
58};
59
60static inline
61const struct raspberrypi_clk_data *clk_hw_to_data(const struct clk_hw *hw)
62{
63 return container_of(hw, struct raspberrypi_clk_data, hw);
64}
65
66struct raspberrypi_clk_variant {
67 bool export;
68 char *clkdev;
69 unsigned long min_rate;
70 bool minimize;
71 bool maximize;
72 u32 flags;
73};
74
75static struct raspberrypi_clk_variant
76raspberrypi_clk_variants[RPI_FIRMWARE_NUM_CLK_ID] = {
77 [RPI_FIRMWARE_ARM_CLK_ID] = {
78 .export = true,
79 .clkdev = "cpu0",
80 .flags = CLK_IS_CRITICAL,
81 },
82 [RPI_FIRMWARE_CORE_CLK_ID] = {
83 .export = true,
84
85 /*
86 * The clock is shared between the HVS and the CSI
87 * controllers, on the BCM2711 and will change depending
88 * on the pixels composited on the HVS and the capture
89 * resolution on Unicam.
90 *
91 * Since the rate can get quite large, and we need to
92 * coordinate between both driver instances, let's
93 * always use the minimum the drivers will let us.
94 */
95 .minimize = true,
96
97 /*
98 * It should never be disabled as it drives the bus for
99 * everything else.
100 */
101 .flags = CLK_IS_CRITICAL,
102 },
103 [RPI_FIRMWARE_M2MC_CLK_ID] = {
104 .export = true,
105
106 /*
107 * If we boot without any cable connected to any of the
108 * HDMI connector, the firmware will skip the HSM
109 * initialization and leave it with a rate of 0,
110 * resulting in a bus lockup when we're accessing the
111 * registers even if it's enabled.
112 *
113 * Let's put a sensible default so that we don't end up
114 * in this situation.
115 */
116 .min_rate = 120000000,
117
118 /*
119 * The clock is shared between the two HDMI controllers
120 * on the BCM2711 and will change depending on the
121 * resolution output on each. Since the rate can get
122 * quite large, and we need to coordinate between both
123 * driver instances, let's always use the minimum the
124 * drivers will let us.
125 */
126 .minimize = true,
127
128 /*
129 * As mentioned above, this clock is disabled during boot,
130 * the firmware will skip the HSM initialization, resulting
131 * in a bus lockup. Therefore, make sure it's enabled
132 * during boot, but after it, it can be enabled/disabled
133 * by the driver.
134 */
135 .flags = CLK_IGNORE_UNUSED,
136 },
137 [RPI_FIRMWARE_V3D_CLK_ID] = {
138 .export = true,
139 .maximize = true,
140 },
141 [RPI_FIRMWARE_PIXEL_CLK_ID] = {
142 .export = true,
143 .minimize = true,
144 .flags = CLK_IS_CRITICAL,
145 },
146 [RPI_FIRMWARE_HEVC_CLK_ID] = {
147 .export = true,
148 .minimize = true,
149 .flags = CLK_IS_CRITICAL,
150 },
151 [RPI_FIRMWARE_ISP_CLK_ID] = {
152 .export = true,
153 .minimize = true,
154 },
155 [RPI_FIRMWARE_PIXEL_BVB_CLK_ID] = {
156 .export = true,
157 .minimize = true,
158 .flags = CLK_IS_CRITICAL,
159 },
160 [RPI_FIRMWARE_VEC_CLK_ID] = {
161 .export = true,
162 .minimize = true,
163 },
164 [RPI_FIRMWARE_DISP_CLK_ID] = {
165 .export = true,
166 .minimize = true,
167 },
168};
169
170/*
171 * Structure of the message passed to Raspberry Pi's firmware in order to
172 * change clock rates. The 'disable_turbo' option is only available to the ARM
173 * clock (pllb) which we enable by default as turbo mode will alter multiple
174 * clocks at once.
175 *
176 * Even though we're able to access the clock registers directly we're bound to
177 * use the firmware interface as the firmware ultimately takes care of
178 * mitigating overheating/undervoltage situations and we would be changing
179 * frequencies behind his back.
180 *
181 * For more information on the firmware interface check:
182 * https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface
183 */
184struct raspberrypi_firmware_prop {
185 __le32 id;
186 __le32 val;
187 __le32 disable_turbo;
188} __packed;
189
190static int raspberrypi_clock_property(struct rpi_firmware *firmware,
191 const struct raspberrypi_clk_data *data,
192 u32 tag, u32 *val)
193{
194 struct raspberrypi_firmware_prop msg = {
195 .id = cpu_to_le32(data->id),
196 .val = cpu_to_le32(*val),
197 };
198 int ret;
199
200 ret = rpi_firmware_property(fw: firmware, tag, data: &msg, len: sizeof(msg));
201 if (ret)
202 return ret;
203
204 *val = le32_to_cpu(msg.val);
205
206 return 0;
207}
208
209static int raspberrypi_fw_is_prepared(struct clk_hw *hw)
210{
211 const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
212 struct raspberrypi_clk *rpi = data->rpi;
213 u32 val = 0;
214 int ret;
215
216 ret = raspberrypi_clock_property(firmware: rpi->firmware, data,
217 tag: RPI_FIRMWARE_GET_CLOCK_STATE, val: &val);
218 if (ret) {
219 dev_err_ratelimited(rpi->dev, "Failed to get %s state: %d\n",
220 clk_hw_get_name(hw), ret);
221 return 0;
222 }
223
224 return !!(val & RPI_FIRMWARE_STATE_ENABLE_BIT);
225}
226
227
228static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw,
229 unsigned long parent_rate)
230{
231 const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
232 struct raspberrypi_clk *rpi = data->rpi;
233 u32 val = 0;
234 int ret;
235
236 ret = raspberrypi_clock_property(firmware: rpi->firmware, data,
237 tag: RPI_FIRMWARE_GET_CLOCK_RATE, val: &val);
238 if (ret) {
239 dev_err_ratelimited(rpi->dev, "Failed to get %s frequency: %d\n",
240 clk_hw_get_name(hw), ret);
241 return 0;
242 }
243
244 return val;
245}
246
247static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate,
248 unsigned long parent_rate)
249{
250 const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
251 struct raspberrypi_clk *rpi = data->rpi;
252 u32 _rate = rate;
253 int ret;
254
255 ret = raspberrypi_clock_property(firmware: rpi->firmware, data,
256 tag: RPI_FIRMWARE_SET_CLOCK_RATE, val: &_rate);
257 if (ret)
258 dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d\n",
259 clk_hw_get_name(hw), ret);
260
261 return ret;
262}
263
264static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw,
265 struct clk_rate_request *req)
266{
267 const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
268 struct raspberrypi_clk_variant *variant = data->variant;
269
270 /*
271 * The firmware will do the rounding but that isn't part of
272 * the interface with the firmware, so we just do our best
273 * here.
274 */
275
276 req->rate = clamp(req->rate, req->min_rate, req->max_rate);
277
278 /*
279 * We want to aggressively reduce the clock rate here, so let's
280 * just ignore the requested rate and return the bare minimum
281 * rate we can get away with.
282 */
283 if (variant->minimize && req->min_rate > 0)
284 req->rate = req->min_rate;
285
286 return 0;
287}
288
289static int raspberrypi_fw_prepare(struct clk_hw *hw)
290{
291 const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
292 struct raspberrypi_clk *rpi = data->rpi;
293 u32 state = RPI_FIRMWARE_STATE_ENABLE_BIT;
294 int ret;
295
296 ret = raspberrypi_clock_property(firmware: rpi->firmware, data,
297 tag: RPI_FIRMWARE_SET_CLOCK_STATE, val: &state);
298 if (ret)
299 dev_err_ratelimited(rpi->dev,
300 "Failed to set clock %s state to on: %d\n",
301 clk_hw_get_name(hw), ret);
302
303 return ret;
304}
305
306static void raspberrypi_fw_unprepare(struct clk_hw *hw)
307{
308 const struct raspberrypi_clk_data *data = clk_hw_to_data(hw);
309 struct raspberrypi_clk *rpi = data->rpi;
310 u32 state = 0;
311 int ret;
312
313 ret = raspberrypi_clock_property(firmware: rpi->firmware, data,
314 tag: RPI_FIRMWARE_SET_CLOCK_STATE, val: &state);
315 if (ret)
316 dev_err_ratelimited(rpi->dev,
317 "Failed to set clock %s state to off: %d\n",
318 clk_hw_get_name(hw), ret);
319}
320
321static const struct clk_ops raspberrypi_firmware_clk_ops = {
322 .prepare = raspberrypi_fw_prepare,
323 .unprepare = raspberrypi_fw_unprepare,
324 .is_prepared = raspberrypi_fw_is_prepared,
325 .recalc_rate = raspberrypi_fw_get_rate,
326 .determine_rate = raspberrypi_fw_dumb_determine_rate,
327 .set_rate = raspberrypi_fw_set_rate,
328};
329
330static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
331 unsigned int parent,
332 unsigned int id,
333 struct raspberrypi_clk_variant *variant)
334{
335 struct raspberrypi_clk_data *data;
336 struct clk_init_data init = {};
337 u32 min_rate, max_rate;
338 int ret;
339
340 data = devm_kzalloc(dev: rpi->dev, size: sizeof(*data), GFP_KERNEL);
341 if (!data)
342 return ERR_PTR(error: -ENOMEM);
343 data->rpi = rpi;
344 data->id = id;
345 data->variant = variant;
346
347 init.name = devm_kasprintf(dev: rpi->dev, GFP_KERNEL,
348 fmt: "fw-clk-%s",
349 rpi_firmware_clk_names[id]);
350 if (!init.name)
351 return ERR_PTR(error: -ENOMEM);
352 init.ops = &raspberrypi_firmware_clk_ops;
353 init.flags = variant->flags | CLK_GET_RATE_NOCACHE;
354
355 data->hw.init = &init;
356
357 ret = raspberrypi_clock_property(firmware: rpi->firmware, data,
358 tag: RPI_FIRMWARE_GET_MIN_CLOCK_RATE,
359 val: &min_rate);
360 if (ret) {
361 dev_err(rpi->dev, "Failed to get clock %d min freq: %d\n",
362 id, ret);
363 return ERR_PTR(error: ret);
364 }
365
366 ret = raspberrypi_clock_property(firmware: rpi->firmware, data,
367 tag: RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
368 val: &max_rate);
369 if (ret) {
370 dev_err(rpi->dev, "Failed to get clock %d max freq: %d\n",
371 id, ret);
372 return ERR_PTR(error: ret);
373 }
374
375 ret = devm_clk_hw_register(dev: rpi->dev, hw: &data->hw);
376 if (ret)
377 return ERR_PTR(error: ret);
378
379 clk_hw_set_rate_range(hw: &data->hw, min_rate, max_rate);
380
381 if (variant->clkdev) {
382 ret = devm_clk_hw_register_clkdev(dev: rpi->dev, hw: &data->hw,
383 NULL, dev_id: variant->clkdev);
384 if (ret) {
385 dev_err(rpi->dev, "Failed to initialize clkdev\n");
386 return ERR_PTR(error: ret);
387 }
388 }
389
390 if (variant->maximize)
391 variant->min_rate = max_rate;
392
393 if (variant->min_rate) {
394 unsigned long rate;
395
396 clk_hw_set_rate_range(hw: &data->hw, min_rate: variant->min_rate, max_rate);
397
398 rate = raspberrypi_fw_get_rate(hw: &data->hw, parent_rate: 0);
399 if (rate < variant->min_rate) {
400 ret = raspberrypi_fw_set_rate(hw: &data->hw, rate: variant->min_rate, parent_rate: 0);
401 if (ret)
402 return ERR_PTR(error: ret);
403 }
404 }
405
406 return &data->hw;
407}
408
409struct rpi_firmware_get_clocks_response {
410 u32 parent;
411 u32 id;
412};
413
414static int raspberrypi_discover_clocks(struct raspberrypi_clk *rpi,
415 struct clk_hw_onecell_data *data)
416{
417 struct rpi_firmware_get_clocks_response *clks;
418 int ret;
419
420 /*
421 * The firmware doesn't guarantee that the last element of
422 * RPI_FIRMWARE_GET_CLOCKS is zeroed. So allocate an additional
423 * zero element as sentinel.
424 */
425 clks = devm_kcalloc(dev: rpi->dev,
426 n: RPI_FIRMWARE_NUM_CLK_ID + 1, size: sizeof(*clks),
427 GFP_KERNEL);
428 if (!clks)
429 return -ENOMEM;
430
431 ret = rpi_firmware_property(fw: rpi->firmware, tag: RPI_FIRMWARE_GET_CLOCKS,
432 data: clks,
433 len: sizeof(*clks) * RPI_FIRMWARE_NUM_CLK_ID);
434 if (ret)
435 return ret;
436
437 while (clks->id) {
438 struct raspberrypi_clk_variant *variant;
439
440 if (clks->id >= RPI_FIRMWARE_NUM_CLK_ID) {
441 dev_err(rpi->dev, "Unknown clock id: %u (max: %u)\n",
442 clks->id, RPI_FIRMWARE_NUM_CLK_ID - 1);
443 return -EINVAL;
444 }
445
446 variant = &raspberrypi_clk_variants[clks->id];
447 if (variant->export) {
448 struct clk_hw *hw;
449
450 hw = raspberrypi_clk_register(rpi, parent: clks->parent,
451 id: clks->id, variant);
452 if (IS_ERR(ptr: hw))
453 return PTR_ERR(ptr: hw);
454
455 data->num = clks->id + 1;
456 data->hws[clks->id] = hw;
457 }
458
459 clks++;
460 }
461
462 return 0;
463}
464
465static int raspberrypi_clk_probe(struct platform_device *pdev)
466{
467 struct clk_hw_onecell_data *clk_data;
468 struct device_node *firmware_node;
469 struct device *dev = &pdev->dev;
470 struct rpi_firmware *firmware;
471 struct raspberrypi_clk *rpi;
472 int ret;
473
474 /*
475 * We can be probed either through the an old-fashioned
476 * platform device registration or through a DT node that is a
477 * child of the firmware node. Handle both cases.
478 */
479 if (dev->of_node)
480 firmware_node = of_get_parent(node: dev->of_node);
481 else
482 firmware_node = of_find_compatible_node(NULL, NULL,
483 compat: "raspberrypi,bcm2835-firmware");
484 if (!firmware_node) {
485 dev_err(dev, "Missing firmware node\n");
486 return -ENOENT;
487 }
488
489 firmware = devm_rpi_firmware_get(dev: &pdev->dev, firmware_node);
490 of_node_put(node: firmware_node);
491 if (!firmware)
492 return -EPROBE_DEFER;
493
494 rpi = devm_kzalloc(dev, size: sizeof(*rpi), GFP_KERNEL);
495 if (!rpi)
496 return -ENOMEM;
497
498 rpi->dev = dev;
499 rpi->firmware = firmware;
500 platform_set_drvdata(pdev, data: rpi);
501
502 clk_data = devm_kzalloc(dev, struct_size(clk_data, hws,
503 RPI_FIRMWARE_NUM_CLK_ID),
504 GFP_KERNEL);
505 if (!clk_data)
506 return -ENOMEM;
507
508 ret = raspberrypi_discover_clocks(rpi, data: clk_data);
509 if (ret)
510 return ret;
511
512 ret = devm_of_clk_add_hw_provider(dev, get: of_clk_hw_onecell_get,
513 data: clk_data);
514 if (ret)
515 return ret;
516
517 rpi->cpufreq = platform_device_register_data(parent: dev, name: "raspberrypi-cpufreq",
518 id: -1, NULL, size: 0);
519
520 return 0;
521}
522
523static void raspberrypi_clk_remove(struct platform_device *pdev)
524{
525 struct raspberrypi_clk *rpi = platform_get_drvdata(pdev);
526
527 platform_device_unregister(rpi->cpufreq);
528}
529
530static const struct of_device_id raspberrypi_clk_match[] = {
531 { .compatible = "raspberrypi,firmware-clocks" },
532 { },
533};
534MODULE_DEVICE_TABLE(of, raspberrypi_clk_match);
535
536static struct platform_driver raspberrypi_clk_driver = {
537 .driver = {
538 .name = "raspberrypi-clk",
539 .of_match_table = raspberrypi_clk_match,
540 },
541 .probe = raspberrypi_clk_probe,
542 .remove = raspberrypi_clk_remove,
543};
544module_platform_driver(raspberrypi_clk_driver);
545
546MODULE_AUTHOR("Nicolas Saenz Julienne <nsaenzjulienne@suse.de>");
547MODULE_DESCRIPTION("Raspberry Pi firmware clock driver");
548MODULE_LICENSE("GPL");
549

source code of linux/drivers/clk/bcm/clk-raspberrypi.c