Version 4.5.103.30 (cherry-pick)

srikumarb · Commit bot · commit f9a0a1636a46 · 2015-08-31T04:24:25.000Z
Merged 434a291 Make FlushICache NOP for Nvidia Denver 1.0 only R=bmeurer@chromium.org, rodolph.perfetta@arm.com BUG=v8:4398 NOTRY=true NOPRESUBMIT=true Review URL: https://codereview.chromium.org/1308403010 Cr-Commit-Position: refs/branch-heads/4.5@{#32} Cr-Branched-From: 7f21153-refs/heads/4.5.103@{#1} Cr-Branched-From: 4b38c15-refs/heads/master@{#29527}
diff --git a/include/v8-version.h b/include/v8-version.h
@@ -11,7 +11,7 @@
 #define V8_MAJOR_VERSION 4
 #define V8_MINOR_VERSION 5
 #define V8_BUILD_NUMBER 103
-#define V8_PATCH_LEVEL 29
+#define V8_PATCH_LEVEL 30
 
 // Use 1 for candidates and 0 otherwise.
 // (Boolean macro values are not supported by all preprocessors.)
diff --git a/src/arm/assembler-arm.cc b/src/arm/assembler-arm.cc
@@ -128,7 +128,8 @@ void CpuFeatures::ProbeImpl(bool cross_compile) {
   if (FLAG_enable_32dregs && cpu.has_vfp3_d32()) supported_ |= 1u << VFP32DREGS;
 
   if (cpu.implementer() == base::CPU::NVIDIA &&
-      cpu.variant() == base::CPU::NVIDIA_DENVER) {
+      cpu.variant() == base::CPU::NVIDIA_DENVER &&
+      cpu.part() <= base::CPU::NVIDIA_DENVER_V10) {
     supported_ |= 1u << COHERENT_CACHE;
   }
 #endif
diff --git a/src/arm64/assembler-arm64.cc b/src/arm64/assembler-arm64.cc
@@ -53,7 +53,8 @@ void CpuFeatures::ProbeImpl(bool cross_compile) {
   // Probe for runtime features
   base::CPU cpu;
   if (cpu.implementer() == base::CPU::NVIDIA &&
-      cpu.variant() == base::CPU::NVIDIA_DENVER) {
+      cpu.variant() == base::CPU::NVIDIA_DENVER &&
+      cpu.part() <= base::CPU::NVIDIA_DENVER_V10) {
     supported_ |= 1u << COHERENT_CACHE;
   }
 }
diff --git a/src/base/cpu.h b/src/base/cpu.h
@@ -59,6 +59,9 @@ class CPU final {
   static const int ARM_CORTEX_A12 = 0xc0c;
   static const int ARM_CORTEX_A15 = 0xc0f;
 
+  // Denver-specific part code
+  static const int NVIDIA_DENVER_V10 = 0x002;
+
   // PPC-specific part codes
   enum {
     PPC_POWER5,

Original file line number	Diff line number	Diff line change
`@@ -128,7 +128,8 @@ void CpuFeatures::ProbeImpl(bool cross_compile) {`
`128`	`128`	`if (FLAG_enable_32dregs && cpu.has_vfp3_d32()) supported_ \|= 1u << VFP32DREGS;`
`129`	`129`
`130`	`130`	`if (cpu.implementer() == base::CPU::NVIDIA &&`
`131`		`- cpu.variant() == base::CPU::NVIDIA_DENVER) {`
	`131`	`+ cpu.variant() == base::CPU::NVIDIA_DENVER &&`
	`132`	`+ cpu.part() <= base::CPU::NVIDIA_DENVER_V10) {`
`132`	`133`	`supported_ \|= 1u << COHERENT_CACHE;`
`133`	`134`	`}`
`134`	`135`	`#endif`
Original file line number	Diff line number	Diff line change
`@@ -53,7 +53,8 @@ void CpuFeatures::ProbeImpl(bool cross_compile) {`
`53`	`53`	`// Probe for runtime features`
`54`	`54`	`base::CPU cpu;`
`55`	`55`	`if (cpu.implementer() == base::CPU::NVIDIA &&`
`56`		`- cpu.variant() == base::CPU::NVIDIA_DENVER) {`
	`56`	`+ cpu.variant() == base::CPU::NVIDIA_DENVER &&`
	`57`	`+ cpu.part() <= base::CPU::NVIDIA_DENVER_V10) {`
`57`	`58`	`supported_ \|= 1u << COHERENT_CACHE;`
`58`	`59`	`}`
`59`	`60`	`}`